參數(shù)資料
型號: AT40KEL040KW1SB
廠商: ATMEL CORP
元件分類: FPGA
英文描述: FPGA, 2304 CLBS, 50000 GATES, PQFP160
封裝: MQFP-160
文件頁數(shù): 17/42頁
文件大?。?/td> 670K
代理商: AT40KEL040KW1SB
24
AT40KEL040
4155G–AERO–05/05
Note:
1. Parameter based on characterization and simulation; it is not tested in production.
Power-On Power Supply
Requirements
Atmel FPGAs require a minimum rated power supply current capacity to ensure proper
initialization, and the power supply ramp-up time does not affect the current required. A
fast ramp-up time requires more current than a slow ramp-up time.
Table 3. Power-on Supply Requirements
Note:
1. Devices are guaranteed to initialize properly at 50% of the minimum current listed
above. A larger capacity power supply may result in a larger initiallization current.
2. Ramp-up time is measured from 0V DC to 3.6V DC. Peak current required lasts less
than 2 ms, and occurs near the internal power on reset threshold voltage.
DC Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IH
High-level Input Voltage
CMOS
70% VCC
V
TTL
2.0
V
IL
Low-level Input Voltage
CMOS
-0.3
30% VCC
V
TTL
-0.3
0.8
V
OH
High-level Output Voltage
I
OH = -4 mA
V
CC = 3.0V
2.4
V
I
OH = -12 mA
V
CC = 3.0V
2.4
V
I
OH = -16 mA
V
CC = 3.0V
2.4
V
OL
Low-level Output Voltage
I
OL = +4 mA
V
CC = 3.0V
0.4
V
I
OL = +12 mA
V
CC = 3.0V
0.4
V
I
OL = +16 mA
V
CC = 3.0V
0.4
V
I
IH
High-level Input Current
V
IN = VCC max
-5
5
A
With pull-down, V
IN = VCC
20
75
300
A
I
IL
Low-level Input Current
V
IN = VSS
-5
5
A
With pull-up, V
IN = VSS
-300.0
-50
-20
A
I
OZH
High-level Tri-state Output
Leakage Current
Without pull-down, V
OUT =
V
CC max
-5
5
A
With pull-down, VOUT = VCC
max
20
300
A
IOZL
Low-level Tri-state Output
Leakage Current
Without pull-up, V
OUT = VSS
-5
mA
With pull-up, V
OUT = VSS
for CON
-500
-150.0
-110
A
I
CC
Standby Current
Consumption
Standby, unprogrammed
1
5
mA
CIN
Input Capacitance
All pins
10
pF
Description
Maximum Current
(1)(2)
Maximum Current Supply
1.2 A
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