參數(shù)資料
型號: AT75C1010
英文描述: AT75C1010 Telephony Software Module [Updated 11/01. 29 Pages] This software module runs on the OakDSPCore subsystem of the AT75 series SIAP. expanding its capabilities and making the processor flexible and east to integrate into most operating systems.
中文描述: AT75C1010電話軟件模塊[更新11/01。 29頁]本軟件模塊上運(yùn)行的AT75系列OakDSPCore子系統(tǒng)統(tǒng)計(jì)所。擴(kuò)大其能力,使處理器的靈活和東部地區(qū)融入大多數(shù)操作系統(tǒng)。
文件頁數(shù): 24/171頁
文件大?。?/td> 1288K
代理商: AT75C1010
12
AT75C DSP Subsystem
1368C–INTAP–08/02
The bit-field operation unit (BFO) is attached to the ALU. Flags are affected as a result
of the bit-field operations as well as a result of the ALU and the barrel shifter operation.
Bx-accumulators
Each Bx-accumulator is organized as two regular 16-bit registers (B0H, B0L, B1H and
B1L) and a 4-bit extension nibble. The two portions of each accumulator can be
accessed as 16-bit data registers using the XDB bus and can be used as 16-bit source
or destination data registers in relevant instructions. The Bx-accumulators can be
swapped with the Ax-accumulators in a single cycle. Saturation arithmetic is provided to
selectively limit overflow from the high portion of an accumulator to the extension bits
when performing a move instruction from one of the accumulators through the XDB. For
more details, refer to “Saturation” on page 12.
Each of the Bx-accumulators can be a source operand of the exponent unit and can be
a source operand or a destination operand of the barrel shifter.
Extension Nibbles
Extension nibbles of B0 and B1 offer protection against 32-bit overflows. When the
result of the barrel shifter crosses bit 31, it sets the extension flag (E) in ST0, represent-
ing crosses of the MSB at BxH. When the sign is lost beyond the MSB of the barrel
shifter and/or beyond the MSB of the extension nibble, the overflow flag (V) in ST0 is set
and latched in the Limit flag (L) in ST0. Refer to “Status Registers” on page 23 for more
details. The extension bits can be accessed with the aid of a single-cycle shift instruction
or by swapping to the Ax-accumulator.
Sign Extension
Sign extension of the 36-bit Bx-accumulators is provided when the Bx or BxH is written
with a smaller size operand. This occurs when these registers are written from XDB or
from the barrel shifter in shift operations.
Loading Bx-accumulators
BxL is cleared while loading data into BxH and BxH is cleared while loading BxL. The
full 36-bit accumulator can be loaded in a single cycle, using the shift instructions or by
another 36-bit accumulator, using the SWAP instruction (refer to “Swapping the Accu-
Shift Value Register
The shift value (SV) register is a 16-bit register used for shifting operations and expo-
nent calculation. In shift operations it determines the amount of shifts and therefore
enables calculating the amount of shifts at run-time. The exponent result is transferred
to the SV register. This register can be used for full normalization by serving as the des-
tination of the exponent calculation and as the control for the shift (see “Normalization”
The SV register can also be used as a general-purpose temporary data register.
Saturation
Saturation arithmetic is provided to selectively limit overflow from the high portion of an
accumulator to the extension bits. Saturation is performed when moving from the high
portion or low portion of one of the accumulators through the XDB, or when using the
LIM instruction, which performs saturation on the 36-bit accumulator. The saturation
logic will substitute a “l(fā)imited” data value having maximum magnitude and the same sign
as the source accumulator.
In case saturation occurs when performing a move instruction (MOV or PUSH) from one
of the accumulators (AxH, AxL, BxL or BxH) through the XDB, the value of the accumu-
lator is not changed. Only the value transferred over the XDB is limited to a full-scale,
16-bit positive (0x7FFF for AxH or BxH; 0xFFFF for AxL or BxL) or negative (0x8000 for
AxH or BxH; 0x0000 for AxL or BxL) value. Limiting will be correctly performed even if
the transfer to the XDB does not immediately follow the accumulator overflow. When an
accumulator is swapped by the SWAP instruction, limitation will be correctly performed
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