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參數(shù)資料
| 型號： | AT89C51ED2-SMRUM |
| 廠商： | Atmel |
| 文件頁數(shù)： | 118/137頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU FLASH 8051 64K 5V 68PLCC |
| 產(chǎn)品培訓模塊： | MCU Product Line Introduction |
| 標準包裝： | 1 |
| 系列： | 89C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 60MHz |
| 連通性： | SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 50 |
| 程序存儲器容量： | 64KB（64K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大小： | 2K x 8 |
| RAM 容量： | 2K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 68-PLCC |
| 包裝： | 標準包裝 |
| 其它名稱： | AT89C51ED2-SMRUMDKR |
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81
4235K–8051–05/08
AT89C51RD2/ED2
18.3
Power-Down Mode
The Power-Down mode places the AT89C51RD2/ED2 in a very low power state. Power-Down
mode stops the oscillator, freezes all clock at known states. The CPU status prior to entering
Power-Down mode is preserved, i.e., the program counter, program status word register retain
their data for the duration of Power-Down mode. In addition, the SFR and RAM contents are pre-
served. The status of the Port pins during Power-Down mode is detailed in Table 18-1.
Note:
VCC may be reduced to as low as VRET during Power-Down mode to further reduce power dissi-
pation. Take care, however, that VDD is not reduced until Power-Down mode is invoked.
18.3.1
Entering Power-Down Mode
To enter Power-Down mode, set PD bit in PCON register. The AT89C51RD2/ED2 enters the
Power-Down mode upon execution of the instruction that sets PD bit. The instruction that sets
PD bit is the last instruction executed.
18.3.2
Exiting Power-Down Mode
Note:
If VCC was reduced during the Power-Down mode, do not exit Power-Down mode until VCC is
restored to the normal operating level.
There are three ways to exit the Power-Down mode:
1.
Generate an enabled external interrupt.
– The AT89C51RD2/ED2 provides capability to exit from Power-Down using INT0#,
INT1#.
Hardware clears PD bit in PCON register which starts the oscillator and restores the
clocks to the CPU and peripherals. Using INTx# input, execution resumes when the
input is released (see Figure 18-1). Execution resumes with the interrupt service
routine. Upon completion of the interrupt service routine, program execution
resumes with the instruction immediately following the instruction that activated
Power-Down mode.
Note:
The external interrupt used to exit Power-Down mode must be configured as level sensitive
(INT0# and INT1#) and must be assigned the highest priority. In addition, the duration of the inter-
rupt must be long enough to allow the oscillator to stabilize. The execution will only resume when
the interrupt is deasserted.
Note:
Exit from power-down by external interrupt does not affect the SFRs nor the internal RAM content.
Figure 18-1. Power-Down Exit Waveform Using INT1:0#
2.
Generate a reset.
– A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU and
peripherals. Program execution momentarily resumes with the instruction
immediately following the instruction that activated Power-Down mode and may
INT1:0#
OSC
Power-down phase
Oscillator restart phase
Active phase
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT89C51ED2-SMSIM | 制造商:Atmel Corporation 功能描述:MCU 8-bit AT89 80C51 CISC 64KB Flash 3.3V/5V 68-Pin PLCC Stick 制造商:Atmel/Adesto Technologies 功能描述:Bulk 制造商:Atmel Corporation 功能描述:AT89C51ED2-SMSIM 8bit microcontroller |
| AT89C51ED2-SMSUM | 功能描述:8位微控制器 -MCU C51ED2 64K FLASH 3-5.5V Ind RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| AT89C51ED2-UM | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Flash Microcontroller |
| AT89C51IC2 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Flash Microcontroller with 2-wire Interface |
| AT89C51IC2_04 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Flash Microcontroller with 2-wire Interface |
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