參數(shù)資料
型號: AT89C51ED2-SMRUM
廠商: Atmel
文件頁數(shù): 77/137頁
文件大?。?/td> 0K
描述: IC MCU FLASH 8051 64K 5V 68PLCC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 1
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 50
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-PLCC
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AT89C51ED2-SMRUMDKR
44
4235K–8051–05/08
AT89C51RD2/ED2
Figure 13-4. PCA Compare Mode and PCA Watchdog Timer
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM is set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur
while modifying the compare value. Writing to CCAPnH will set ECOM. For this reason, user
software should write CCAPnL first, and then CCAPnH. Of course, the ECOM bit can still be
controlled by accessing to CCAPMn register.
13.3
High Speed Output Mode
In this mode the CEX output (on port 1) associated with the PCA module will toggle each time a
match occurs between the PCA counter and the modules capture registers. To activate this
mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR must be set (See
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
CH
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n = 0 to 4
0xDA t o 0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
16 bit comparator
Match
CCON
0xD8
PCA I T
Enable
PCA counter/ timer
RESET *
CIDL
CPS1 CPS0
ECF
CMOD
0xD9
WDTE
Reset
Write to
CCAPnL
Write t o
CCAPnH
CF
CCF2 CCF1 CCF0
CR
CCF3
CCF4
1
0
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