參數(shù)資料
型號: ATWEBDVK-02WC
廠商: Atmel
文件頁數(shù): 131/137頁
文件大?。?/td> 0K
描述: KIT DEV TCP/IP AT89C51RD2 WEBCAM
標準包裝: 1
系列: @Web
主要目的: *
嵌入式: *
已用 IC / 零件: AT89C51RD2
主要屬性: *
次要屬性: *
已供物品: 板,帶網(wǎng)絡 Webcam 模塊和軟件
產(chǎn)品目錄頁面: 617 (CN2011-ZH PDF)
93
4235K–8051–05/08
AT89C51RD2/ED2
24. Flash/EEPROM Memory
The Flash memory increases EEPROM and ROM functionality with in-circuit electrical erasure
and programming. It contains 64K bytes of program memory organized respectively in 512
pages of 128 bytes. This memory is both parallel and serial In-System Programmable (ISP). ISP
allows devices to alter their own program memory in the actual end product under software con-
trol. A default serial loader (bootloader) program allows ISP of the Flash.
The programming does not require external dedicated programming voltage. The necessary
high programming voltage is generated on-chip using the standard VCC pins of the
microcontroller.
24.1
Features
Flash EEPROM Internal Program Memory
Boot vector allows user provided Flash loader code to reside anywhere in the Flash memory
space. This configuration provides flexibility to the user.
Default loader in Boot ROM allows programming via the serial port without the need of a user
provided loader.
Up to 64K bytes external program memory if the internal program memory is disabled (EA =
0).
Programming and erasing voltage with standard power supply
Read/Programming/Erase:
– Byte-wise read without wait state
– Byte or page erase and programming (10 ms)
Typical programming time (64K bytes) is 22s with on chip serial bootloader
Parallel programming with 87C51 compatible hardware interface to programmer
Programmable security for the code in the Flash
100K write cycles
10 years data retention
24.2
Flash Programming and Erasure
The 64-K byte Flash is programmed by bytes or by pages of 128 bytes. It is not necessary to
erase a byte or a page before programming. The programming of a byte or a page includes a
self erase before programming.
There are three methods of programming the Flash memory:
1.
The on-chip ISP bootloader may be invoked which will use low level routines to pro-
gram the pages. The interface used for serial downloading of Flash is the UART.
2.
The Flash may be programmed or erased in the end-user application by calling low-
level routines through a common entry point in the Boot ROM.
3.
The Flash may be programmed using the parallel method by using a conventional
EPROM programmer. The parallel programming method used by these devices is simi-
lar to that used by EPROM 87C51 but it is not identical and the commercially available
programmers need to have support for the AT89C51RD2/ED2. The bootloader and the
Application Programming Interface (API) routines are located in the BOOT ROM.
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ATWEBEVK-01 功能描述:KIT EVAL TCP/IP AT89C51AC2 RoHS:否 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:@Web 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 主要目的:電源管理,電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板
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