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參數(shù)資料
| 型號： | CA95C09-33CT |
| 元件分類： | 加密電路 |
| 英文描述： | TELECOM, DATA ENCRYPTION CIRCUIT, PQFP44 |
| 封裝： | TQFP-44 |
| 文件頁數(shù)： | 30/42頁 |
| 文件大小： | 180K |
| 代理商： | CA95C09-33CT |
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CA95C68/18/09
Tundra Semiconductor Corporation
3-60
Tundra Semiconductor Corporation
Pipelining
Once the device has been initialized for dual port
conguration, two data blocks are loaded into the device to
ll the Output Register and the DES algorithm processing
unit. Now blocks of data can be strobed in and out
concurrently. When the ciphering session is completed the
DCP must be emptied by reading out the last two bytes.
Figure 3-23 illustrates a programming ow chart for
programming the DCP for pipelined mode of operation.
Figure 3-24 shows the minimum timing conguration for
maximum throughput for this device. The total time to
transfer “n” blocks is (n+1)x18+3 clock cycles. The DCP can
also be operated in pipelined mode when congured for
signal port operation. Once initialized, one block of data is
loaded into the device. Then, in a loop, one block of data is
strobed in and one block is read out. The rst block of data
loaded before entering the loop is ciphered while the input of
the second block is occurring.
START
LOAD FIRST
BLOCK OF DATA
LOAD
INPUT DATA
IS
INPUT FLAG
ACTIVE
?
READ
OUTPUT DATA*
READ REMAINING
2 BLOCKS OF DATA
AT
END OF
SESSION
?
YES
NO
YES
NO
IS
INPUT FLAG
ACTIVE
?
NO
LOAD NEXT
BLOCK OF DATA
IS
OUTPUT FLAG
ACTIVE
?
NO
ENTER
STOP COMMAND
* DATA INPUT AND OUTPUT CONCURRENTLY
YES
Figure 3-23 : Pipelining Operational Flow Chart
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