參數(shù)資料
型號: CAT28F102
英文描述: 1 Megabit CMOS Flash Memory(1M(64K x 16位)位CMOS閃速存儲器)
中文描述: 1兆位的CMOS快閃記憶體(100萬(64K的× 16位)位的CMOS閃速存儲器)
文件頁數(shù): 5/14頁
文件大?。?/td> 159K
代理商: CAT28F102
CAT28F102
5
Doc. No. 25038-0A 2/98 F-1
INPUT PULSE LEVELS
REFERENCE POINTS
2.0 V
1.5V
0.8 V
2.4 V
0.45 V
0.0
5108 FHD F04
Note:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8) For Load and Reference Points see Figures 1 and 2
This parameter is tested initially and after a design or process change that affects the parameter.
Output floating (High-Z) is defined as the state where the external data line is no longer driven by the output buffer.
Input Rise and Fall Times (10% to 90%) < 10 ns.
Input Pulse Levels = 0.45V and 2.4V. For high speed input pulse levels 0.0V and 3.0V.
Input and Output Timing Reference = 0.8V and 2.0V. For high speed input and output timing reference=1.5V.
Low-Z is defined as the state where the external data may be driven by the output buffer but may not be valid.
For Load and Reference Points see Figures 3 and 4
1.3V
DEVICE
UNDER
TEST
1N914
3.3K
CL = 100 pF
OUT
CL INCLUDES JIG CAPACITANCE
INPUT PULSE LEVELS
REFERENCE POINTS
2.0 V
0.8 V
2.4 V
0.45 V
5108 FHD F03
Figure 1. A.C. Testing Input/Output Waveform
(3)(4)(5)
Figure 2. A.C. Testing Load Circuit (example)
Figure 3. High Speed A.C. Testing Input/Output Waveform
(3)(4)(5)
JEDEC
Standard
28F102-45
(7)
28F102-55
(7)
28F102-70
(7)
28F102- 90
(8)
Vcc=5V+5%
Vcc=5V+5%
Symbol
Symbol
Parameter
Min.
Max.
Min. Max. Min.
Max.
Min.
Max
Unit
t
AVAV
t
RC
Read Cycle Time
45
55
70
90
ns
t
ELQV
t
CE
CE
Access Time
45
55
70
90
ns
t
AVQV
t
ACC
Address Access Time
45
55
70
90
ns
t
GLQV
t
OE
OE
Access Time
20
25
28
35
ns
t
AXQX
t
OH
Output Hold from Address
OE
/
CE
Chan
0
0
0
0
ns
t
GLQX
t
OLZ(1)(6)
t
LZ(1)(6)
t
DF(1)(2)
OE
to Output in Low-Z
0
0
0
0
ns
t
ELQX
CE
to Output in Low-Z
0
0
0
0
ns
t
GHQZ
t
EHQZ(1)(2)
-
OE
High to Output High-Z
15
15
18
20
ns
CE
High to Output High-Z
15
15
25
30
ns
t
WHGL
Write Recovery Time Before
Read
6
6
6
6
μ
s
A.C. CHARACTERISTICS, Read Operation
V
CC
= +5V
±
10%, unless otherwise specified
1.3V
DEVICE
UNDER
TEST
1N914
3.3K
CL = 100 pF
OUT
CL INCLUDES JIG CAPACITANCE
Figure 4. High Speed A.C. Testing Load Circuit (example)
30
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