參數(shù)資料
型號(hào): CAT28F102
英文描述: 1 Megabit CMOS Flash Memory(1M(64K x 16位)位CMOS閃速存儲(chǔ)器)
中文描述: 1兆位的CMOS快閃記憶體(100萬(wàn)(64K的× 16位)位的CMOS閃速存儲(chǔ)器)
文件頁(yè)數(shù): 8/14頁(yè)
文件大?。?/td> 159K
代理商: CAT28F102
CAT28F102
8
Doc. No. 25038-0A 2/98 F-1
READ OPERATIONS
Read Mode
A Read operation is performed with both CE and OE low
and with WE high. V
PP
can be either high or low,
however, if V
PP
is high, the Set READ command has to
be sent before reading data (see Write Operations). The
data retrieved from the I/O pins reflects the contents of
the memory location corresponding to the state of the 16
address pins. The respective timing waveforms for the
read operation are shown in Figure 5. Refer to the AC
Read characteristics for specific timing parameters.
Signature Mode
The signature mode allows the user to identify the IC
manufacturer and the type of device while the device
resides in the target system. This mode can be activated
in either of two ways; through the conventional method
of applying a high voltage (12V) to address pin A
9
or by
sending an instruction to the command register (see
Write Operations).
The conventional mode is entered as a regular READ
mode by driving the CE and OE pins low (with WE high),
and applying the required high voltage on address pin A
9
while all other address lines are held at V
IL
.
A Read cycle from address 0000H retrieves the binary
code for the IC manufacturer on outputs I/O
0
to I/O
15
:
CATALYST Code = 0000 0000 0011 0001 (0031H)
A Read cycle from address 0001H retrieves the binary
code for the device on outputs I/O
0
to I/O
15
.
28F102 Code = 0000 0000 0101 0001 (0051H)
Standby Mode
With CE at a logic-high level, the CAT28F102 is placed
in a standby mode where most of the device circuitry is
disabled, thereby substantially reducing power con-
sumption. The outputs are placed in a high-impedance
state.
Figure 5. A.C. Timing for Read Operation
tEHQZ(tDF)
ADDRESSES
28F102 F05
28F102 Fig. 6
CE (E)
OE (G)
WE (W)
DATA (I/O)
HIGH-Z
POWER UP
STANDBY
DEVICE AND
ADDRESS SELECTION
OUPUTS
ENABLED
DATA VALID
STANDBY
ADDRESS STABLE
OUTPUT VALID
tAVQV (tACC)
tELQX (tLZ)
tGLQX (tOLZ)
tGLQV (tOE)
tELQV (tCE)
tAXQX(tOH)
tGHQZ (tDF)
tAVAV (tRC)
POWER DOWN
HIGH-Z
tWHGL
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