CC-2401K2 Page 32 of 66 2007, Copeland Communications, Inc. CC-2401K2 Datasheet Rev 1.5 S-Register Summary (Continued) “S” Register Ad" />
參數(shù)資料
型號: CC-2401K2A-CS
廠商: Copeland Communications Inc
文件頁數(shù): 26/66頁
文件大?。?/td> 0K
描述: MODEM 2400BAUD SECURE 3.3V
標準包裝: 30
數(shù)據(jù)格式: V.21,V.22,V.23,Bell 103
波特率: 2.4k
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 模塊
包裝: 散裝
配用: 539-1002-ND - KIT EVALUATION WORLD MODEM II
其它名稱: 539-1010
CC-2401K2A-CS-ND
Data Sheet
CC-2401K2
Page 32 of 66
2007, Copeland Communications, Inc.
CC-2401K2 Datasheet Rev 1.5
S-Register Summary (Continued)
“S”
Register
Address
(hex)
Name
Function
Reset
S37
0x37
CRD
Carrier detect return. Minimum length of time that a
carrier must return and be detected in order to be
recognized after a carrier loss is detected (5/3 ms units).
0x20
S39
0x39
CDT
Carrier detect timeout. Amount of time modem waits for
carrier detect before aborting a call (1 second units).
0x3C
S3A
0x3A
ATD
Delay between going off hook and answer tone
generation when in answer mode (53.33 ms units).
0x29
S3B
0x3B
RP
Minimum number of consecutive ring pulses per ring
burst.
0x03
S3C
0x3C
CIDG
This is a bit-mapped register
*
0x01
S62
0x62
RC
This is a bit-mapped register
*
0x41
S82
0x82
IST
This is a bit-mapped register
*
0x08
SDB
0xDB
LVS
Line Voltage Status. Eight bit signed 2’s complement
number representing the tip-ring voltage. Each bit
represents 1 volt. Polarity of the voltage is represented by
the MSB (sign bit). 0000_0000 = Measured voltage is <
3V.
SDF
0xDF
DGSR
This is a bit-mapped register
*
0x0C
SE0
0xE0
CF1
This is a bit-mapped register
*
0x22
SE1
0xE1
GPIO1
This is a bit-mapped register
*
0x04
SE2
0xE2
GPIO2
This is a bit-mapped register
*
0x00
SE3
0xE3
GPD
This is a bit-mapped register
*
0x00
SE4
0xE4
CF5
This is a bit-mapped register
*
0x00
SE5
0xE5
DADL
(SE8 = 0x00) Write only definition. DSP register address
lower bits [7:0].
*
0x00
SE5
0xE5
DDL
(SE8 = 0x01) Write only definition. DSP data word lower
bits [7:0].
*
0x00
SE5
0xE5
DSP1
(SE8 = 0x02) Read only definition. This is a bit-mapped
register
*
0x00
SE5
0xE5
DSP2
(SE8 = 0x02) Write only definition. This is a bit-mapped
register
*
0x00
SE6
0xE6
DADH
(SE8 = 0x00) Write only definition. DSP register address
upper bits [15:8].
0x00
SE6
0xE6
DDH
(SE8 = 0x01) Write only definition. DSP data word upper
bits [13:8].
0x00
SE6
0xE6
DSP3
(SE8 = 0x02) Write only definition. This is a bit-mapped
register
*
0x00
SE8
0xE8
DSPR4
Set the mode to define E5 and E6 for low level DSP
control.
0x00
SEB
0xEB
TPD
This is a bit-mapped register
*
0x00
SEC
0xEC
RV1
This is a bit-mapped register
*
0x88
SED
0xED
RV2
This is a bit-mapped register
*
0x19
SEE
0xEE
RV3
This is a bit-mapped register
*
0x16
SF0
0xF0
DAA0
This is a bit-mapped register
*
0x40
SF1
0xF1
DAA1
This is a bit-mapped register
*
0x0C
SF2
0xF2
DAA2
This is a bit-mapped register
*
0x00
SF3
0xF3
DAA3
Line current Status. 8 bit value returning the loop current.
Each bit represents 1.1 mA of loop current. Accuracy is
not guaranteed if the loop current is less than required for
normal operation
0x00
*NOTE: These registers are explained in detail in the following section.
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