參數(shù)資料
型號： CDB5346
廠商： Cirrus Logic Inc
文件頁數(shù)： 25/38頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR CS5346
標(biāo)準(zhǔn)包裝： 1
ADC 的數(shù)量： 2
位數(shù)： 24
采樣率（每秒）： 192k
數(shù)據(jù)接口： 串行
輸入范圍： 3.15 Vpp
在以下條件下的電源（標(biāo)準(zhǔn)）： 205mW @ 192kSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： CS5346
已供物品： 板，纜線，CD
產(chǎn)品目錄頁面： 756 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： CS5346-CQZR-ND - IC ADC AUD 103DB 200KHZ 48-LQFP
598-1692-ND - IC ADC AUD 103DB 200KHZ 48LQFP
其它名稱： 598-1790
DS861PP3
31
CS5346
7.7
Channel A PGA Control - Address 08h
7.7.1
Channel A PGA Gain (Bits 5:0)
Function:
Sets the gain or attenuation for the ADC input PGA stage. The gain may be adjusted from -12 dB to
+12 dB in 0.5 dB steps. The gain bits are in two’s complement with the Gain0 bit set for a 0.5 dB step.
Register settings outside of the ±12 dB range are reserved and must not be used. See Table 10 for ex-
ample settings.
7.8
ADC Input Control - Address 09h
7.8.1
PGA Soft Ramp or Zero Cross Enable (Bits 4:3)
Function:
Soft Ramp Enable
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.
Zero Cross Enable
Zero Cross Enable dictates that signal-level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel. See Table 11.
Soft Ramp and Zero Cross Enable
Soft Ramp and Zero Cross Enable dictate that signal-level changes, either by attenuation changes or mut-
ing, will occur in 1/8 dB steps and be implemented on asignal zero crossing. The 1/8 dB level change will
occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sam-
ple rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel. See Table 11.
7
65
432
10
Reserved
Gain5
Gain4
Gain3
Gain2
Gain1
Gain0
Gain[5:0]
Setting
101000
-12 dB
000000
0 dB
011000
+12 dB
Table 10. Example Gain and Attenuation Settings
7
65
432
10
Reserved
PGASoft
PGAZero
Sel2
Sel1
Sel0
相關(guān)PDF資料
PDF描述
CDB5345 EVALUATION BOARD FOR CS5345
ASM06DSEN-S243 CONN EDGECARD 12POS .156 EYELET
ASM06DSEH-S243 CONN EDGECARD 12POS .156 EYELET
MLG1005S82NJ INDUCTOR MULTILAYER 82NH 0402
CDB5341 BOARD EVAL FOR CS5341 STEREO ADC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB5351 功能描述:音頻 IC 開發(fā)工具 Eval Bd 24-Bit 108dB 192kHz Mult-Bit ADC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB5360 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Evaluation Board
CDB5361 功能描述:音頻 IC 開發(fā)工具 Eval Bd 24-Bit 114dB 192kHz Mult-Bit ADC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB5364 功能描述:音頻 IC 開發(fā)工具 Eval Bd 114dB 4-Ch ADC w/TDM RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB5366 功能描述:音頻 IC 開發(fā)工具 Eval Bd 114dB 6-Ch ADC w/TDM RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*