參數(shù)資料
型號(hào): CDB5364
廠商: Cirrus Logic Inc
文件頁數(shù): 13/42頁
文件大?。?/td> 0K
描述: EVALUATION BOARD FOR CS5364
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 24
采樣率(每秒): 192k
數(shù)據(jù)接口: I²C,SPI?
在以下條件下的電源(標(biāo)準(zhǔn)): 365mW @ 192kSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: CS5364
已供物品: 板,CD
相關(guān)產(chǎn)品: CS5364-CQZR-ND - IC ADC 4CH 114DB 216KHZ 48-LQFP
598-1697-ND - IC ADC 4CH 114DB 216KHZ 48-LQFP
598-1088-ND - IC ADC 4CH 114DB 216KHZ 48-LQFP
20
DS625F4
CS5364
4.3
Master Clock Source
The CS5364 requires a Master Clock that can come from one of two sources: an on-chip crystal oscillator
driver or an externally generated clock.
4.3.1
On-Chip Crystal Oscillator Driver
When using the on-board crystal oscillator driver, the XTI pin (pin 21) is the input for the Master Clock
(MCLK) to the device. The XTO pin (pin 22) must not be used to drive anything other than the oscillator
tank circuitry. When using the on-board crystal driver, the topology shown in Figure 7 must be used. The
crystal oscillator manufacturer supplies recommended capacitor values. A buffered copy of the XTI input is
available as an output on the MCLK pin (pin 23), which is level-controlled by VLS and may be used to syn-
chronize other parts to the device.
Figure 7. Crystal Oscillator Topology
4.3.2
Externally Generated Master Clock
If an external clock is used, the XTI and XTO pins must be grounded, and the MCLK pin becomes an input
for the system master clock. The incoming MCLK should be at the logic level set by the user on the VLS
supply pin.
XTI
XTO
22
21
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