參數(shù)資料
型號： CR16HCT9VJE8
英文描述： Microcontroller
中文描述： 微控制器
文件頁數(shù)： 106/157頁
文件大?。?/td> 1256K
代理商： CR16HCT9VJE8
www.national.com
106
PRI[3:0]
Transmit Priority Code. The PRI[3:0] bits con-
tain the user defined transmit priority code for
the message buffer.
Data Length Code. The DLC[3:0] bits deter-
mine the number of data bytes within a re-
ceived/transmitted frame. For transmission,
these bits need to be set according to the num-
ber of data bytes to be transmitted. For recep-
tion, these bits indicate the number of valid
received data bytes available in the message
buffer. Table 27 shows the possible bit combi-
nations for DLC[3:0] for data lengths from 0 to
8 bytes.
DLC[3:0]
Note:
The maximum number of data bytes received/trans-
mitted is 8, even if the data length code is set to a value great-
er than 8. Thus, if the data length code is greater or equal to
eight bytes, the bits DLC2 to DLC0 are ignored.
20.9.4
During the processing of standard frames, the Extended-
Identifier-bit (IDE) is set to “0”. The bits ID1[3:0], ID0[15:0]
are “don’t care” bits. A standard frame with eight data bytes
is shown in Table 28.
IDE
Identifier Extension. IDE is set to “0” to indicate
that the message is a standard frame using 11
identifier bits. If IDE is set to “1”, the object
stored in the buffer is handled as an extended
frame.
RTR
Remote Transmission Request. RTR is set to
“1” to indicate that the message is a remote
frame. For a data frame, the RTR bit is set to
“0”.
ID[10:0]The ID buffer bits ID10 to ID0 are used for the 11
standard frame identifier bits.
Storage of Standard Messages
d. TX_BUSYx indicates that a buffers is scheduled for transmission or is actively transmitting; it can be due to
one of two cases:
- a message is pending for transmission or is currently transmitting
- an automated answer is pending for transmission or is currently transmitting
e. This condition does not occur
Table 27
Data Length Coding
Number of data
bytes
DLC3
DLC2
DLC1
DLC0
0
0
0
0
0
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
Table 27
Data Length Coding
Number of data
bytes
DLC3
DLC2
DLC1
DLC0
Table 28
Standard Frame with 8 Data Bytes
ADDR
BUFFER
register
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
xxxE
16
ID1
ID10
ID9
ID8
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
RTR
IDE
don’t care
xxxC
16
ID0
don’t care
xxxA
16
DATA0
Data
1.7
Data
1.6
Data
1.5
Data
1.4
Data
1.3
Data
1.2
Data
1.1
Data
1.0
Data
2.7
Data
2.6
Data
2.5
Data
2.4
Data
2.3
Data
2.2
Data
2.1
Data
2.0
xxx8
16
DATA1
Data
3.7
Data
3.6
Data
3.5
Data
3.4
Data
3.3
Data
3.2
Data
3.1
Data
3.0
Data
4.7
Data
4.6
Data
4.5
Data
4.4
Data
4.3
Data
4.2
Data
4.1
Data
4.0
xxx6
16
DATA2
Data
5.7
Data
5.6
Data
5.5
Data
5.4
Data
5.3
Data
5.2
Data
5.1
Data
5.0
Data
6.7
Data
6.6
Data
6.5
Data
6.4
Data
6.3
Data
6.2
Data
6.1
Data
6.0
xxx4
16
DATA3
Data
7.7
Data
7.6
Data
7.5
Data
7.4
Data
7.3
Data
7.2
Data
7.1
Data
7.0
Data
8.7
Data
8.6
Data
8.5
Data
8.4
Data
8.3
Data
8.2
Data
8.1
Data
8.0
xxx2
16
TSTP
TSTP
15
TSTP
14
TSTP
13
TSTP
12
TSTP
11
TSTP
10
TSTP
9
TSTP
8
TSTP
7
TSTP
6
TSTP
5
TSTP
4
TSTP
3
TSTP
2
TSTP
1
TSTP
0
xxx0
16
CNTSTAT
DLC3
DLC2
DLC1
DLC0
Reserved
PRI3
PRI2
PRI1
PRI0
ST3
ST2
ST1
ST0
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