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| 型號(hào)： | CR16MCS9VJE8Y |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁(yè)數(shù)： | 96/157頁(yè) |
| 文件大?。?/td> | 1256K |
| 代理商： | CR16MCS9VJE8Y |
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A separate filtering path is used for buffer 14. For this buffer
the acceptance filtering is established by the buffer ID in con-
junction with the basic filtering mask. This basic mask uses
the same method as the global mask. Setting a bit to “1”
changes the associated bit in the buffer ID to a “don’t care”
bit.
Therefore the basic mask allows a large number of infrequent
messages to be received by this buffer.
Note:
If the BMASK register is equal to the GMASK register,
the buffer 14 can be used the same way as the buffers 0 to
13.
The buffers 0 to 13 are scanned prior to buffer 14. Subse-
quently, the buffer 14 will not be checked for a matching ID
when one of the buffers 0 to 13 has already received an ob-
ject.
By setting the BUFFLOCK bit in the configuration register,
the receiving buffer is automatically locked after a reception
of one valid frame. The buffer will be unlocked again after the
CPU has read the data and has written RX_READY in the
buffer status field. With this lock function, the user has the ca-
pability to save several messages with the same identifier or
same identifier group into more than one buffer. For example,
a buffer with the second highest priority will receive a mes-
sage if the buffer with the highest priority has already re-
ceived a message and is now locked (provided that both
buffers use the same acceptance filtering mask).
As shown in Figure 59, several messages with the same ID
are received while BUFFLOCK is enabled. The filtering mask
of the buffers 0, 1, 13 and 14 is set to accept this message.
The first incoming frame will be received by buffer 0. As buff-
er 0 is now locked the next frame will be received by buffer 1,
and so on. If all matching receive buffers are full and locked,
a further incoming message will not be received by any buff-
er.
20.5
All received frames will initially be buffered in a hidden re-
ceive buffer until the frame is valid. (The validation point for a
received message is the penultimate bit of EOF.) The re-
ceived identifier is then compared to every buffer ID together
with the respective mask and the status. As soon as the val-
idation point is reached, the whole contents of the hidden
buffer is copied into the matching message buffer as shown
in Figure 60.
Note:
The hidden receive buffer must not be accessed by
the CPU.
The following section gives an overview of the reception of
the different types of frames.
RECEIVE STRUCTURE
GMASK
00000
11111111
00000000
00000000
01010
XXXXXXXX
10101010
10101010
01010
10101010
10101010
10101010
BUFFER0_ID
BUFFER1_ID
BUFFER14_ID
BUFFER13_ID
BMASK
00000
11111111
00000000
00000000
sav is empty
saved when buffer
is empty
saved when buffer
is empty
01010
01010
01010
10101010
10101010
10101010
10101010
10101010
10101010
XXXXXXXX
XXXXXXXX
XXXXXXXX
saved when buffer
is empty
received ID
Figure 59.
Message Storage with BUFFLOCK Enabled
相關(guān)PDF資料 |
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| CR16MCT5VJE7Y | Microcontroller |
| CR16HCS5VJE8 | Microcontroller |
| CR16HCS9VJE7Y | Microcontroller |
| CR16HCS9VJE8Y | Microcontroller |
| CR16HCT5 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CR16MCS9VJE9 | 功能描述:16位微控制器 - MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| CR16MCS9VJE9/NOPB | 功能描述:16位微控制器 - MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| CR16MCS9VJE90 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16MCS9VJE91 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
| CR16MCS9VJE92 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Family of 16-bit CAN-enabled CompactRISC Microcontrollers |
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