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參數資料
| 型號： | CS2200-CP-CZZR |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | XO, clock |
| 英文描述： | PHASE LOCKED LOOP, 75 MHz, PDSO10 |
| 封裝： | 3 MM, LEAD FREE, MO-187, MSOP-10 |
| 文件頁數： | 9/26頁 |
| 文件大?。?/td> | 307K |
| 代理商： | CS2200-CP-CZZR |
CS2200-CP
DS759PP1
17
eighth bit of the address is the R/W bit. If the operation is a write, the next byte is the Memory Address Point-
er (MAP) which selects the register to be read or written. If the operation is a read, the contents of the reg-
ister pointed to by the MAP will be output. Setting the auto increment bit in MAP allows successive reads or
writes of consecutive registers. Each byte is separated by an acknowledge bit. The ACK bit is output from
the CS2200 after each input byte is read and is input from the microcontroller after each transmitted byte.
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in Figure 11, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-
dition. The following pseudocode illustrates an aborted write operation followed by a read operation.
Send start condition.
Send 100111x0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto increment off.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 100111x1(chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
Setting the auto increment bit in the MAP allows successive reads or writes of consecutive registers. Each
byte is separated by an acknowledge bit.
4
5
6
7
24 25
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA +1
START
ACK
STOP
ACK
1
0
1
AD0
0
SDA
INCR
6
5
4
3
2
1
0
7
6
1
0
7
6
1
0
7
6
1
0
1
2
3
8
9
12
16 17 18
19
10 11
13 14 15
27 28
26
DATA +n
Figure 11. Control Port Timing, IC Write
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA +1
START
ACK
STOP
ACK
1
0
1
1 1 AD0 0
SDA
1
0
1
0
1 AD0 1
CHIP ADDRESS (READ)
START
INCR
6
5
4
3
2
1
0
7
0
7
0
7
0
NO
16
8
9
12 13 14 15
4
5
6
7
0
1
20 21 22 23 24
26 27 28
2
3
10 11
17 18
19
25
ACK
DATA + n
STOP
Figure 12. Control Port Timing, IC Aborted Write + Read
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CS2200CP-CZZR | 功能描述:時鐘合成器/抖動清除器 IC General Purpose PLL Crystal RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CS2200CP-DZZ | 功能描述:時鐘合成器/抖動清除器 IC General Purpose PLL Crystal RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CS2200CP-DZZR | 功能描述:時鐘合成器/抖動清除器 IC General Purpose PLL Crystal RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CS2200-OTP | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Fractional-N Frequency Synthesizer |
| CS2200-OTP_09 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Fractional-N Frequency Synthesizer |
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