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參數(shù)資料
| 型號(hào)： | CXD3500R |
| 廠商： | Sony Corporation |
| 英文描述： | Timing Generator for LCD Panel(LCD面板的定時(shí)信號(hào)發(fā)生器) |
| 中文描述： | 時(shí)序發(fā)生器的液晶面板（液晶面板的定時(shí)信號(hào)發(fā)生器） |
| 文件頁數(shù)： | 13/73頁 |
| 文件大?。?/td> | 792K |
| 代理商： | CXD3500R |
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CXD3500R
Each control data is described in detail below.
The following descriptions define the width of one dot clock as "clk".
PLLP11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
These bits set the frequency division ratio (master clock) of the internal 1/N frequency divider for the PLL. The
data is 12 bits and the frequency division ratio can be set up to 4096. However, the internal logic circuits of this
TG operate at 1/2 clock, so the PLLP0 setting is invalid. When N is an odd number, use an external frequency
divider.
The actual frequency division ratio should be set as follows.
Number of clk for the horizontal period – 2 = Actual number of dots set
Examples of settings for major modes are shown below.
Note)
When using an external frequency divider (serial data HR is L), these settings are not necessary. (They
can also be set to all L.)
1) Macintosh16 (832
×
624)
PLLP setting value = 1152 (horizontal period) – 2
→
1150 (LHLLLHHHHHHL: LSB)
PLLP
Setting data
11
L
10
H
9
L
8
L
7
L
6
H
5
H
4
H
3
H
2
H
1
H
0
L
2) SVGA (800
×
600)
PLLP setting value = 1056 (horizontal period) – 2
→
1054 (LHLLLLLHHHHL: LSB)
PLLP
Setting data
11
L
10
H
9
L
8
L
7
L
6
L
5
L
4
L
3
H
2
H
1
H
0
L
3) VGA (640
×
480)
PLLP setting value = 800 (horizontal period) – 2
→
798 (LLHHLLLHHHHL: LSB)
PLLP
Setting data
11
L
10
L
9
H
8
H
7
L
6
L
5
L
4
H
3
H
2
H
1
H
0
L
4) PC98 (640
×
400)
PLLP setting value = 848 (horizontal period) – 2
→
846 (LLHHLHLLHHHL: LSB)
PLLP
Setting data
11
L
10
L
9
H
8
H
7
L
6
H
5
L
4
L
3
H
2
H
1
H
0
L
5) NTSC double speed (640
×
480)
PLLP setting value = 1560 (horizontal period) – 2
→
1558 (LHHLLLLHLHHL: LSB)
PLLP
Setting data
11
L
10
H
9
H
8
L
7
L
6
L
5
L
4
H
3
L
2
H
1
H
0
L
6) PAL double speed (762
×
572)
PLLP setting value = 1880 (horizontal period) – 2
→
1878 (LHHHLHLHLHHL: LSB)
PLLP
Setting data
11
L
10
H
9
H
8
H
7
L
6
H
5
L
4
H
3
L
2
H
1
H
0
L
VESA SVGA60
VGA60
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| CXD3508ATQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:LCD Interface IC |
| CXD3508BTQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:LCD Interface IC |
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