參數(shù)資料
型號(hào): CXD3500R
廠商: Sony Corporation
英文描述: Timing Generator for LCD Panel(LCD面板的定時(shí)信號(hào)發(fā)生器)
中文描述: 時(shí)序發(fā)生器的液晶面板(液晶面板的定時(shí)信號(hào)發(fā)生器)
文件頁(yè)數(shù): 22/73頁(yè)
文件大小: 792K
代理商: CXD3500R
– 22 –
CXD3500R
VSTFX, VSTPOL
These bits set the VST pulse polarity. When VSTFX is H, the polarity of the VST pulse is positive regardless of
other settings. Normally set VSTPOL to H. See the table below for details.
Panel
VSTFX
XGA
SVGA
H
L
L
L
L
L
L
H
H
L
H
L
H
VSTPOL
DWN
VST pulse polarity
—: don't care
HCKFX, HCKPOL
These bits set the HCK1 and 2 pulse polarity. When HCKFX is H, the HCK1 and 2 pulse polarity is fixed
regardless of the right/left inversion control setting RGT. However, the polarity is inverted by HCKPOL.
See the table and figures below for details.
HCKFX
H
H
L
L
L
L
L
L
H
H
L
H
L
H
L
H
RGT
HCKPOL
B
A
A
B
B
A
HCK polarity
—: don't care
HST
HCK1
HCK2
HST
HCK1
HCK2
HCKM
This bit sets the HCK1 and 2 pulse width. When HCKM is L, the HCK1 and 2 pulse for 6-dot simultaneous
sampling is output. When HCKM is H, the HCK1 and 2 pulse for 12-dot simultaneous sampling is output. Set
the width to match the panel specifications.
SVGA panel
6-dot simultaneous sampling
HCKM: L
XGA panel
12-dot simultaneous sampling
HCKM: H
HSTW1, 0: LL, HSTP5 to 0: LLLLHH, HCKM: L
A in the table above
B in the table above
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