參數(shù)資料
型號: CXD3500R
廠商: Sony Corporation
英文描述: Timing Generator for LCD Panel(LCD面板的定時信號發(fā)生器)
中文描述: 時序發(fā)生器的液晶面板(液晶面板的定時信號發(fā)生器)
文件頁數(shù): 8/73頁
文件大?。?/td> 792K
代理商: CXD3500R
– 8 –
CXD3500R
(4) NTSC
ODD FIELD
EVEN FIELD
HSYNC
VSYNC
H/2
Sync signal phase reference
Input Signal Protocol
1. Horizontal sync signal
a) A standard signal (HSYNC) should be input for each mode.
However, since the CXD3500R requires a double-speed signal as input during NTSC/PAL double-speed
display when not using the built-in double-speed controller, the input specifications at that time are
similar to those for normal data type sync signals, and there should not be a 1/2 offset with respect to
the vertical sync signal.
b) The input sync signal polarity is not fixed, and is set by the serial data (HPOL).
2. Vertical sync signal
a) A sync-separated, normal-speed VSYNC should be input as the vertical sync signal.
b) The input sync signal polarity is not fixed, and is set by the serial data (VPOL).
c) The phase relationship between HSYNC and VSYNC is specified as follows for the CXD3500R.
(1) XGA, Macintosh16, SVGA, VGA, PC-98
HSYNC
VSYNC
Sync signal
phase reference
(2) Double-speed NTSC
Double-speed HSYNC
VSYNC
Sync signal
phase reference
(3) Double-speed PAL
VSYNC
Double-speed HSYNC
Sync signal
phase reference
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