參數(shù)資料
型號(hào)： CY7C025-35JC
英文描述： SRAM|8KX16|CMOS|LDCC|84PIN|PLASTIC
中文描述： 靜態(tài)存儲(chǔ)器| 8KX16 |的CMOS | LDCC | 84PIN |塑料
文件頁(yè)數(shù)： 3/20頁(yè)
文件大?。?/td> 301K
代理商： CY7C025-35JC
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
Document #: 38-06051 Rev. *A
Page 11 of 20
Notes:
37. CE = HIGH for the duration of the above timing (both write and read cycle).
38. I/O0R = I/O0L = LOW (request semaphore); CER = CEL = HIGH.
39. Semaphores are reset (available to both ports) at cycle start.
40. If tSPS is violated, the semaphore will definitely be obtained by one side or the other, but which side will get the semaphore is unpredictable.
Switching Waveforms (continued)
tSOP
tSAA
VALID ADRESS
tHD
DATAIN VALID
DATAOUT VALID
tOHA
tAW
tHA
tACE
tSOP
tSCE
tSD
tSA
tPWE
tSWRD
tDOE
WRITE CYCLE
READ CYCLE
OE
R/W
I/O 0
SEM
A 0–A 2
Semaphore Read After Write Timing, Either Side[37]
MATCH
tSPS
A0L–A2L
MATCH
R/WL
SEML
A 0R–A2R
R/WR
SEM R
Timing Diagram of Semaphore Contention[38, 39, 40]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C025-35JI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
CY7C025-35JXC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
CY7C025-35JXI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
CY7C02555AC 制造商:CYPRESS 功能描述:New
CY7C025-55AC 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Dual 5V 128K-Bit 8K x 16 55ns 100-Pin TQFP
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