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參數(shù)資料
| 型號： | CY7C1021CV33-10ZIT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 16 STANDARD SRAM, 10 ns, PDSO44 |
| 封裝： | TSOP2-44 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 554K |
| 代理商： | CY7C1021CV33-10ZIT |
CY7C1021CV33
Document Number: 38-05132 Rev. *H
Page 6 of 14
Switching Characteristics
Over the Operating Range [5]
Parameter
Description
-8
-10
-12
-15
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle
tpower[6]
VCC(Typical) to the First Access
100
s
tRC
Read Cycle Time
8
10
12
15
ns
tAA
Address to Data Valid
8
10
12
15
ns
tOHA
Data Hold from Address Change
3333
ns
tACE
CE LOW to Data Valid
8
10
12
15
ns
tDOE
OE LOW to Data Valid
5567
ns
tLZOE
OE LOW to Low Z[7]
0000
ns
tHZOE
OE HIGH to High Z[7, 8]
4567
ns
tLZCE
CE LOW to Low Z[7]
3333
ns
tHZCE
CE HIGH to High Z[7, 8]
4567
ns
tPU[9]
CE LOW to Power Up
0000
ns
tPD[9]
CE HIGH to Power Down
8
10
12
15
ns
tDBE
Byte Enable to Data Valid
5567
ns
tLZBE
Byte Enable to Low Z
0000
ns
tHZBE
Byte Disable to High Z
4567
ns
Write Cycle[10]
tWC
Write Cycle Time
8
10
12
15
ns
tSCE
CE LOW to Write End
7
8
9
10
ns
tAW
Address Setup to Write End
7
8
9
10
ns
tHA
Address Hold from Write End
0000
ns
tSA
Address Setup to Write Start
0000
ns
tPWE
WE Pulse Width
6
7
8
10
ns
tSD
Data Setup to Write End
5568
ns
tHD
Data Hold from Write End
0000
ns
tLZWE
WE HIGH to Low Z[7]
3333
ns
tHZWE
WE LOW to High Z[7, 8]
4567
ns
tBW
Byte Enable to End of Write
6789
ns
Notes
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, and input pulse levels of 0 to 3.0V.
6. tPOWER gives the minimum amount of time that the power supply is at typical VCC values until the first memory access is performed.
7. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
8. tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads and Waveforms. Transition is measured ±500 mV from
steady state voltage.
9. This parameter is guaranteed by design and is not tested.
10. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW, and BHE/BLE LOW. CE, WE, and BHE/BLE is LOW to initiate a write. The
transition of these signals terminate the write. The input data setup and hold timing is referenced to the leading edge of the signal that terminates the write.
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| CY7C1021CV33-10ZSXA | 功能描述:靜態(tài)隨機(jī)存取存儲器 64Kx16, 3.3V CPG R7 ASYNC RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1021CV33-10ZSXAKJ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1021CV33-10ZSXAT | 功能描述:靜態(tài)隨機(jī)存取存儲器 64Kx16, 3.3V CPG R7 ASYNC RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1021CV33-10ZXC | 功能描述:IC SRAM 1MBIT 10NS 44TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| CY7C1021CV33-10ZXCT | 功能描述:IC SRAM 1MBIT 10NS 44TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
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