參數(shù)資料
型號(hào): CY7C1336
廠商: Cypress Semiconductor Corp.
英文描述: 64K x 32 Synchronous Flow-Through 3.3V Cache RAM(3.3V 64K x 32 同步流通式高速緩沖RAM)
中文描述: 64K的× 32同步流動(dòng),通過3.3V的高速緩存內(nèi)存(3.3 64K的× 32同步流通式高速緩沖內(nèi)存)
文件頁(yè)數(shù): 7/12頁(yè)
文件大?。?/td> 189K
代理商: CY7C1336
CY7C1336
PRELIMINARY
7
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
Min.
Max.
Unit
V
DD
V
DDQ
V
OH
V
OL
V
IH
Power Supply Voltage
3.135
3.63
V
I/O Supply Voltage
3.135
3.63
V
Output HIGH Voltage
V
DDQ
= 3.3V, V
DD
= Min., I
OH
= –4.0 mA
V
DDQ
= 3.3V, V
DD
= Min., I
OL
= 8.0 mA
2.4
V
Output LOW Voltage
0.4
V
Input HIGH Voltage
1.7
V
DD
+
0.3V
V
V
IL
I
X
Input LOW Voltage
[4]
–0.3
5
0.8
V
μ
A
Input Load Current
(except ZZ and MODE)
GND
V
I
V
DDQ
5
Input Current of MODE
Input = V
SS
Input = V
DDQ
Input = V
SS
Input = V
DDQ
GND
V
I
V
DD,
Output Disabled
V
DD
=Max., V
OUT
=GND
V
DD
=Max., I
out
=0 mA,
f = f
MAX
=1/t
CYC
.
–30
μ
A
μ
A
μ
A
μ
A
μ
A
mA
5
Input Current of ZZ
–5
30
I
OZ
I
OS
I
DD
Output Leakage Current
Output Short Circuit Current
[6]
–5
5
–300
V
DD
Operating Supply Current
8.5-ns cycle, 117 MHz
290
mA
10-ns cycle, 100 MHz
260
mA
15-ns cycle, 66 MHz
260
mA
I
DD
(L).
V
DD
Operating Supply
Current for Low Power Version
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
8.5-ns cycle, 117 MHz
261
mA
10-ns cycle, 100 MHz
244
mA
15-ns cycle, 66 MHz
244
mA
I
SB1
Automatic CE Power-Down
Current—TTL Inputs Switching
Max. V
DD
, Device Deselected,
V
IN
V
IH
or V
IN
V
IL
f = f
MAX
= 1/t
CYC
8.5-ns cycle, 117 MHz
60
mA
10-ns cycle, 100 MHz
50
mA
15-ns cycle, 66 MHz
50
mA
I
SB2
Automatic CE Power-Down
Current — CMOS Inputs Static
Max. V
DD
, Device Deselected,
V
IN
0.3V or V
IN
> V
DDQ
– 0.3V,
f = 0
Std. version –All
speeds
2.5
mA
I
SB3
Automatic CE Power-Down
Current—CMOS Inputs Switching,
F=Max
Max. V
DD
, Device Deselected,
or V
IN
0.3V or V
IN
> V
DDQ
0.3V
f = f
MAX
= 1/t
CYC
Max. V
DD
, Device Deselected,
V
IN
V
IH
or V
IN
V
IL
,f = 0
8.5-ns cycle, 117 MHz
40
mA
10-ns cycle, 100 MHz
30
mA
15-ns cycle, 66 MHz
30
mA
I
SB4
Automatic CE Power-Down Cur-
rent — CMOS Inputs Static, F=Max
All speeds
25
mA
Capacitance
[7]
Parameter
C
IN
C
I/O
Notes:
6.
Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
7.
Tested initially and after any design or process changes that may affect these parameters.
Description
Test Conditions
Max.
6.0
8.0
Unit
pF
pF
Input Capacitance
I/O Capacitance
T
A
= 25
°
C, f = 1 MHz,
V
DD
= 5.0V
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