參數(shù)資料
型號: CYWUSB6935
廠商: Cypress Semiconductor Corp.
英文描述: WirelessUSB LR 2.4-GHz DSSS Radio SoC(WirelessUSB LR 2.4-GHz DSSS無線SoC)
中文描述: 的WirelessUSB LR 2.4 GHz的無線擴頻系統(tǒng)芯片(的WirelessUSB LR 2.4 GHz的無線擴頻芯片)
文件頁數(shù): 10/32頁
文件大?。?/td> 395K
代理商: CYWUSB6935
CYWUSB6935
Document #: 38-16008 Rev. *D
Page 10 of 32
Addr: 0x05
REG_CONFIG
Default: 0x01
7
6
5
4
3
2
1
0
Reserved
IRQ Pin Select
Figure 7-4. Configuration
Bit
Name
Description
7:2
Reserved
These bits are reserved and should be written with zeroes.
1:0
IRQ Pin Select
The Interrupt Request Pin Select bits are used to determine the drive method of the IRQ pin.
11 = Open Source (IRQ asserted = 1, IRQ deasserted = Hi-Z)
10 = Open Drain (IRQ asserted = 0, IRQ deasserted = Hi-Z)
01 = CMOS (IRQ asserted = 1, IRQ deasserted = 0)
00 = CMOS Inverted (IRQ asserted = 0, IRQ deasserted = 1)
Addr: 0x06
REG_SERDES_CTL
Default: 0x03
7
6
5
4
3
2
1
0
Reserved
SERDES
Enable
EOF Length
Figure 7-5. SERDES Control
Bit
Name
Description
7:4
Reserved
These bits are reserved and should be written with zeroes.
3
SERDES Enable The SERDES Enable bit is used to switch between bit-serial mode and SERDES mode.
1 = SERDES enabled
0 = SERDES disabled, bit-serial mode enabled
When the SERDES is enabled data can be written to and read from the IC one byte at a time, through the use of the
SERDES Data registers. The bit-serial mode requires bits to be written one bit at a time through the use of the
DIO/DIOVAL pins, refer to section 3.2. It is recommended that SERDES mode be used to avoid the need to manage
the timing required by the bit-serial mode.
2:0
EOF Length
The End of Frame Length bits are used to set the number of sequential bit times for an inter-frame gap without valid
data before an EOF event will be generated. When in receive mode and a valid bit has been received the EOF event
can then be identified by the number of bit times that expire without correlating any new data. The EOF event causes
data to be moved to the proper SERDES Data Register and can also be used to generate interrupts. If 0 is the EOF
length, an EOF condition will occur at the first invalid bit after a valid reception.
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