參數(shù)資料
型號: DAC1008D650HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
封裝: DAC1008D650HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1008D650HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù): 24/98頁
文件大?。?/td> 551K
代理商: DAC1008D650HN
DAC1008D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2010
24 of 98
NXP Semiconductors
DAC1008D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
10.3.2
SPI timing description
The SPI interface can operate at a frequency of up to 15 MHz. The SPI timing is shown in
Figure 14
.
The SPI timing characteristics are given in
Table 9
.
Table 9.
Symbol
f
SCLK
t
w(SCLK)
t
su(SCS_N)
t
h(SCS_N)
t
su(SDIO)
t
h(SDIO)
t
w(RESET_N)
Fig 14. SPI timing diagram
SPI timing characteristics
Parameter
SCLK frequency
SCLK pulse width
SCS_N set-up time
SCS_N hold time
SDIO set-up time
SDIO hold time
RESET_N pulse width
Min
-
30
20
20
10
5
30
Typ
-
-
-
-
-
-
-
Max
15
-
-
-
-
-
-
Unit
MHz
ns
ns
ns
ns
ns
ns
001aaj813
50 %
t
w(RESET_N)
t
su(SCS_N)
t
su(SDIO)
t
h(SDIO)
t
h(SCS_N)
t
w(SCLK)
50 %
RESET_N
SCS_N
SCLK
SDIO
50 %
50 %
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