參數(shù)資料
型號(hào)： DAC1008D650HN
廠商： NXP Semiconductors N.V.
元件分類(lèi)： 外設(shè)及接口
英文描述： Dual 10-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
封裝： DAC1008D650HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1008D650HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁(yè)數(shù)： 72/98頁(yè)
文件大?。?/td> 551K
代理商： DAC1008D650HN
DAC1008D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2010
72 of 98
NXP Semiconductors
DAC1008D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
Table 118. K28_LN3_FLAG register (address 09h) bit description
Bit
Symbol
4
K28_7_LN3
3
K28_5_LN3
2
K28_4_LN3
1
K28_3_LN3
0
K28_0_LN3
Access
R
R
R
R
R
Value
-
-
-
-
-
Description
K28_7 /F/ symbols found in lane 3
K28_5 /K/ symbols found in lane 3
K28_4 /Q/ symbols found in lane 3
K28_3 /A/ symbols found in lane 3
K28_0 /R/ symbols found in lane 3
Table 119. KOUT_UNEXPECTED_FLAG register (address 0Ah) bit description
Bit
Symbol
3
DEC_KOUT_UNEXP_LN3
2
DEC_KOUT_UNEXP_LN2
1
DEC_KOUT_UNEXP_LN1
0
DEC_KOUT_UNEXP_LN0
Access
R
R
R
R
Value
-
-
-
-
Description
unexpected /K/ symbols found in lane 3
unexpected /K/ symbols found in lane 2
unexpected /K/ symbols found in lane 1
unexpected /K/ symbols found in lane 0
Table 120. LOCK_CNT_MON_LN01 register (address 0Bh) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 4
LOCK_CNT_MON_LN1[3:0]
Access
R
Value
-
Description
lock_state monitor synchronization word alignment
lane 1
lock_state monitor synchronization word alignment
lane 0
3 to 0
LOCK_CNT_MON_LN0[3:0]
R
-
Table 121. LOCK_CNT_MON_LN23 register (address 0Ch) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 4
LOCK_CNT_MON_LN3[3:0]
Access
R
Value
-
Description
lock_state monitor synchronization word alignment
lane 3
lock_state monitor synchronization word alignment
lane 2
3 to 0
LOCK_CNT_MON_LN2[3:0]
R
-
Table 122. CS_STATE_LNX register (address 0Dh) bit description
Default settings are shown highlighted.
Bit
Symbol
7 to 6
CS_STATE_LN3[1:0]
5 to 4
CS_STATE_LN2[1:0]
3 to 2
CS_STATE_LN1[1:0]
1 to 0
CS_STATE_LN0[1:0]
Access
R
R
R
R
Value
-
-
-
-
Description
monitor cs_state fsm lane 3 (see
Table 142
)
monitor cs_state fsm lane 2 (see
Table 142
)
monitor cs_state fsm lane 1 (see
Table 142
)
monitor cs_state fsm lane 0 (see
Table 142
)
Table 123. RST_BUF_ERR_FLAGS register (address 0Eh) bit description
Default settings are shown highlighted.
Bit
Symbol
7
RST_BUF_ERR_FLAGS
Access
R/W
Value
0
Description
reset ILA_BUF_ERR_LNn flags
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DAC1008D650HN/C1,5 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 10BIT DAC 650MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1008D650HN-C1 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1008D750 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Dual 10-bit DAC up to 750 Msps 2×, 4× or 8× interpolating with JESD204A interface
DAC1008D750_11 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
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