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參數(shù)資料
| 型號(hào)： | DAC3550A |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | DAC |
| 英文描述： | ECONOLINE: RSZ/P - 1kVDC |
| 中文描述： | 32-BIT DAC, PQFP44 |
| 封裝： | METRIC, PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 20/35頁(yè) |
| 文件大?。?/td> | 626K |
| 代理商： | DAC3550A |
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DAC 3550A
20
Micronas
3.7.3. Characteristics
At T
A
= 0 to 70
°
C
*
, V
SUPD
= 2.7 to 5.5 V, V
SUPA
= 3.0 to 5.5 V; typical values at T
J
= 27
°
C, V
SUPD
= V
SUPA
= 3.3 V,
quartz frequency = 14.725 MHz, duty cycle = 50 %, positive current flows into the IC
* =standard temperature range, DAC 3550A tested in extended temperature range on request
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
Digital Supply
I
VDD
Current Consumption
VDD
5
mA
V
SUPD
=3 V
I
VDD
Current Consumption
VDD
8
mA
V
SUPD
=5 V
Digital Input Pin
–
Leakage
I
I
Input Leakage Current
CLI, WSI,
DAI,
TESTEN,
PORQ,
DEECTRL,
MCS1/2
±
1
μ
A
V
GND
≤
V
I
≤
V
SUP
Digital Output Pin
–
Clock Out
V
OH
Output High Voltage
CLKOUT
V
SUPD
0.3
V
no load at output
V
OL
Output Low Voltage
0.3
V
I
2
C Bus
R
on
Output Impedance
SCL, SDA
60
I
load
= 5 mA,
V
SUPD
= 2.7 V
Analog Supply
I
AVDD
Current Consumption
Analog Audio, SEL_53V = 0
AVDD0/1
8
1.5
11
mA
mA
PWMD = 0, Mute
PWMD = 1, Mute
SEL_53V = 1
11
2
15
mA
mA
PWMD = 0, Mute
PWMD = 1, Mute
PSRR
AA
Power Supply Rejection
Ratio for Analog Audio
Output
AVDD0/1,
OUTL/R
50
dB
1 kHz sine at
100 mV
rms
20
dB
≤
100 kHz sine at
100 mV
rms
PSRR
LO
Power Supply Rejection
Ratio for Line Output
AVDD0/1,
FINL/R
50
dB
1 kHz sine at
100 mV
rms
40
dB
≤
100 kHz sine at
100 mV
rms
Reference Frequency Generation
V
DCXTI
DC Voltage at Oscillator
Pins
XTI/O
0.5 *
V
SUPA
V
C
LI
Input Capacitance at
Oscillator Pin
XTI/O
3
pF
Vxtalout
Voltage Swing at Oscillator
Pins, pp
XTI/O
60
100
%
VSUPA
Oscillator Start-Up Time
50
ms
AV
DD
/V
DD
≥
2.5 V
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