參數(shù)資料
型號(hào): DAC3550A
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: DAC
英文描述: ECONOLINE: RSZ/P - 1kVDC
中文描述: 32-BIT DAC, PQFP44
封裝: METRIC, PLASTIC, QFP-44
文件頁數(shù): 34/35頁
文件大?。?/td> 626K
代理商: DAC3550A
DAC 3550A
PRELIMINARY DATA SHEET SUPPLEMENT
page 2 of 3
MICRONAS INTERMETALL
2. Pin Connections and Short Descriptions
NC = not connected, leave vacant
X
= obligatory; connect as described
in application circuit diagram
LV
VSS = if not used, connect to VSS
VDD= connect to VDD
= if not used, leave vacant
Unassigned pins must be left vacant.
Pin No. / Pin ID
PMQFP
44-pin
Pin Name
Type
Connection
(If not used)
Short Description
PBGA
49-ball
1
B5
AGNDC
BID
X
Analog reference voltage
2
A6
AVSS1
SUPPLY
X
VSS 1 for audio back-end
3
B4
AVSS0
SUPPLY
X
VSS 0 for audio output amplifiers
4
NC
LV
Not connected
5
C4
OUTL
OUT
LV
Audio output:
headphone left or speaker +
6
NC
LV
Not connected
7
A3
OUTR
OUT
LV
Audio output:
headphone right or Speaker
8
NC
LV
Not connected
9
A2
AVDD0
SUPPLY
X
VDD 0 for audio output amplifiers
10
A1
AVDD1
SUPPLY
X
VDD 1 for audio back-end
11
NC
LV
Not connected
12
C3
XTI
IN
X
Quartz oscillator pin 1
13
C2
XTO
BID
X
Quartz oscillator pin 2
14
D2
CLKOUT
OUT
LV
Clock output
15
C1
SCL
BID
LV
I
2
C clock
16
D3
SDA
BID
LV
I
2
C data
17
D1
VSS
SUPPLY
X
Digital VSS
18
E1
VDD
SUPPLY
X
Digital VDD
19
F2
MCS1
IN
X
I
2
C chip sSelect 1
20
F1
MCS2
IN
X
I
2
C chip select 2
21
G1
DEECTRL
IN
VSS
Deemphasis on/off control
22
NC
LV
Not connected
23
E3
CLI
VSS
I
2
S bit clock
24
F3
DAI
IN
VSS
I
2
S data
25
F4
WSI
IN
VSS
I
2
S frame identification
26
G4
PORQ
IN
VDD
Power-on-reset, active-low
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