參數(shù)資料
型號: DAC3550A
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: DAC
英文描述: ECONOLINE: RSZ/P - 1kVDC
中文描述: 32-BIT DAC, PQFP44
封裝: METRIC, PLASTIC, QFP-44
文件頁數(shù): 24/35頁
文件大?。?/td> 626K
代理商: DAC3550A
DAC 3550A
24
Micronas
R
IAUX
Input Resistance at
Input Pins
AUXnL/R
12.1
11.6
15
17.9
19.0
k
k
T
J
=
27
°
C
T
A
=
0 to 70
°
C
1)
Input selected,
PWMD = 0
i =
±
10
μ
A,
referred to VREF
24.2
23.3
30
35.8
37.9
k
k
T
J
=
27
°
C
T
A
=
0 to 70
°
C
1)
Input not selected
i =
±
10
μ
A,
referred to VREF
R
OOUT
Output Resistance at
Output Pins
OUTL/R
700
T
J
=
27
°
C
PWMD = 1
i =
±
200
μ
A,
referred to VREF
R
OFILT
Output Resistance of
Filter Pins
FINL
15
k
PWMD = 1, Mute
i =
±
10
μ
A,
referred to VREF
FINR
11.25
k
V
OffI
Offset Voltage at Input Pins
AUXnL/R
20
20
mV
referred to AGNDC
V
OffO
Offset Voltage at
Output Pins
OUTL/R
10
10
mV
Mute
referred to AGNDC
V
OffFO
Offset Voltage at
Filter Output Pins
FOUTL/R
20
20
mV
PWMD = 0,
referred to AGNDC
V
OffFI
Offset Voltage at
Filter Input Pins
FINL/R
20
20
mV
PWMD = 0,
referred to AGNDC
dV
DCPD
Difference of DC Voltage at
Output Pins after Back-end
Low Power Sequence
OUTL/R
10
10
mV
Analog Gain = Mute,
PWMD switched from 0
to 1
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
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