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參數(shù)資料
| 型號： | DC570A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 2/28頁 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2440 |
| 軟件下載： | QuikEval System |
| 設(shè)計資源： | DC570A Design File DC570A Schematic |
| 標準包裝： | 1 |
| 系列： | QuikEval™ |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 3.5k |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2440 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2440CGN#TRPBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP LTC2440IGN#TRPBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP LTC2440IGN#PBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP LTC2440CGN#PBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP LTC2440IGN#TR-ND - IC CONV A/D 24-BIT DIFF 16-SSOP LTC2440CGN#TR-ND - IC CONV A/D 24-BIT DIFF 16-SSOP LTC2440IGN-ND - IC ADC DIFFER 24-BIT HS 16-SSOP LTC2440CGN-ND - IC ADC DIFFER 24-BIT HS 16-SSOP |
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LTC2440
10
2440fd
APPLICATIONS INFORMATION
Initially, the LTC2440 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
While in this sleep state, power consumption is reduced
below 10μA. The part remains in the sleep state as long
as CS is HIGH. The conversion result is held indenitely
in a static shift register while the converter is in the sleep
state.
Once CS is pulled LOW, the device begins outputting the
conversion result. There is no latency in the conversion
result. The data output corresponds to the conversion
just performed. This result is shifted out on the serial data
out pin (SDO) under the control of the serial clock (SCK).
Data is updated on the falling edge of SCK allowing the
user to reliably latch data on the rising edge of SCK (see
Figure 3). The data output state is concluded once 32-bits
are read out of the ADC or when CS is brought HIGH. The
device automatically initiates a new conversion and the
cycle repeats.
Through timing control of the CS, SCK and EXT pins,
the LTC2440 offers several exible modes of operation
(internal or external SCK). These various modes do not
require programming conguration registers; moreover,
they do not disturb the cyclic operation described above.
These modes of operation are described in detail in the
Serial Interface Timing Modes section.
Ease of Use
The LTC2440 data output has no latency, lter settling
delay or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog voltages is easy. Speed/resolution adjust-
ments may be made seamlessly between two conversions
without settling errors.
The LTC2440 performs offset and full-scale calibrations
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation described
above. The advantage of continuous calibration is extreme
stability of offset and full-scale readings with respect to
time, supply voltage change and temperature drift.
Power-Up Sequence
The LTC2440 automatically enters an internal reset state
when the power supply voltage VCC drops below ap-
proximately 2.2V. This feature guarantees the integrity
of the conversion result and of the serial interface mode
selection.
When the VCC voltagerisesabovethiscriticalthreshold,the
converter creates an internal power-on-reset (POR) signal
with a duration of approximately 0.5ms. The POR signal
clears all internal registers. Following the POR signal, the
LTC2440 starts a normal conversion cycle and follows the
succession of states described above. The rst conversion
result following POR is accurate within the specications
of the device if the power supply voltage is restored within
the operating range (4.5V to 5.5V) before the end of the
POR time interval.
Reference Voltage Range
This converter accepts a truly differential external reference
voltage. The absolute/common mode voltage specication
for the REF+ and REF– pins covers the entire range from
GND to VCC. For correct converter operation, the REF+ pin
must always be more positive than the REF– pin.
The LTC2440 can accept a differential reference voltage
from 0.1V to VCC. The converter output noise is determined
by the thermal noise of the front-end circuits, and as such,
its value in microvolts is nearly constant with reference
voltage. A decrease in reference voltage will not signi-
cantly improve the converter’s effective resolution. On the
other hand, a reduced reference voltage will improve the
converter’s overall INL performance.
Input Voltage Range
The analog input is truly differential with an absolute/com-
mon mode range for the IN+ and IN– input pins extending
from GND – 0.3V to VCC + 0.3V. Outside these limits, the
ESD protection devices begin to turn on and the errors
due to input leakage current increase rapidly. Within these
limits, the LTC2440 converts the bipolar differential input
signal, VIN = IN+ – IN–, from –FS = –0.5 VREF to +FS =
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