參數(shù)資料
型號: DC570A
廠商: Linear Technology
文件頁數(shù): 6/28頁
文件大?。?/td> 0K
描述: BOARD DELTA SIGMA ADC LTC2440
軟件下載: QuikEval System
設(shè)計(jì)資源: DC570A Design File
DC570A Schematic
標(biāo)準(zhǔn)包裝: 1
系列: QuikEval™
ADC 的數(shù)量: 2
位數(shù): 24
采樣率(每秒): 3.5k
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
工作溫度: 0°C ~ 70°C
已用 IC / 零件: LTC2440
已供物品:
相關(guān)產(chǎn)品: LTC2440CGN#TRPBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440IGN#TRPBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440IGN#PBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440CGN#PBF-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440IGN#TR-ND - IC CONV A/D 24-BIT DIFF 16-SSOP
LTC2440CGN#TR-ND - IC CONV A/D 24-BIT DIFF 16-SSOP
LTC2440IGN-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440CGN-ND - IC ADC DIFFER 24-BIT HS 16-SSOP
LTC2440
14
2440fd
APPLICATIONS INFORMATION
Figure 4. SDI Speed/Resolution Programming
MSB
BIT 28
BIT 27
BIT 26
BIT 25
BIT 1
BIT 0
LSB
Hi-Z
2440 F04
SIG
BIT 29
“0”
BIT 30
EOC
Hi-Z
CS
SCK
SDI
SDO
BUSY
BIT 31
*OSR4 BIT MUST BE AT FIRST SCK RISING EDGE DURING SERIAL DATA OUT CYCLE
OSR4*
OSR3
OSR2
OSR1
OSR0
Table 3. SDI Speed/Resolution Programming
OSR4
OSR3
OSR2
OSR1
OSR0
CONVERSION RATE
RMS
NOISE
ENOB
OSR
INTERNAL
9MHz CLOCK
EXTERNAL
10.24MHz CLOCK
X
0
1
3.52kHz
4kHz
23μV
17
64
X
0
1
0
1.76kHz
2kHz
3.5μV
20
128
0
880Hz
1kHz
2μV
21.3
256*
X
0
1
880Hz
1kHz
2μV
21.3
256
X
0
1
0
440Hz
500Hz
1.4μV
21.8
512
X
0
1
0
1
220Hz
250Hz
1μV
22.4
1024
X
0
1
0
110Hz
125Hz
750nV
22.9
2048
X
0
1
55Hz
62.5Hz
510nV
23.4
4096
X
1
0
27.5Hz
31.25Hz
375nV
24
8192
X
1
0
1
13.75Hz
15.625Hz
250nV
24.4
16384
X
1
6.875Hz
7.8125Hz
200nV
24.6
32768**
**Address allows tying SDI HIGH *Additional address to allow tying SDI LOW
Table 4. LTC2440 Interface Timing Modes
Conguration
SCK
Source
Conversion
Cycle
Control
Data
Output
Control
Connection
and
Waveforms
External SCK, Single Cycle Conversion
External
CS and SCK
Figures 5, 6
External SCK, 2-Wire I/O
External
SCK
Figure 7
Internal SCK, Single Cycle Conversion
Internal
CS
Figures 8, 9
Internal SCK, 2-Wire I/O, Continuous Conversion
Internal
Continuous
Internal
Figure 10
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