參數(shù)資料
型號: DM560P
廠商: Electronic Theatre Controls, Inc.
英文描述: V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set
中文描述: .90綜合數(shù)據(jù)/傳真/語音/揚聲器調(diào)制解調(diào)器設(shè)備集
文件頁數(shù): 26/43頁
文件大?。?/td> 242K
代理商: DM560P
DM560P
V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set
Chip 2: DM6581/DM6582 ITU-T V.90 TX
and RX Digital Signal Processor
Description
DM6581/82 Description
26
Preliminary
Version: DM560P-DS-P07
August 11, 2000
The DM6581/DM6582 are application specific Digital
Signal Processors (DSP) dedicated to V.90 modem
operation. They are used in pairs. The primary
component of these devices is a 22.43Mips DSP
core processor. The basic clock frequency of this
device is 40.32MHz. An internal built PLL circuit is
used to boost the clock from 40.32MHz to 80.64MHz
or 89.74MHz. This 80.64MHz/89.74MHz clock is
used as the clock source of DSP core processor. A
16-byte dual port SRAM is utilized to provide the
communication between DSP and the DM6583.
There are two dedicated serial ports that provide the
link between the DSP and the DM6580. The
DM6581/DM6582 are bonded-out in a 100-pin QFP
package for mass production, and provide the most
economical package.
DM6581/82 Block Diagram
Timing
Logical & PLL
Serial Port
Dual Port
RAM
ROM
DSP Core
Data
RAM
Program
RAM
OSCI
OSCO
MSCLK
CODEC_CLK
PMA[0:15]
PMD[0:23]
DMA[0:13]
DMD[0:15]
DM6581/82 Features
DM6581 for TX data-pump, DM6582 for the RX
data-pump
Built in program ROM
2 serial ports to interface with codec
16 byte dual port RAM
Clock Generator for codec chip
Built in PLL
Built in Co-Processor
Power Down Mode
Eye Pattern Register
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