參數(shù)資料
型號(hào): DM560P
廠商: Electronic Theatre Controls, Inc.
英文描述: V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set
中文描述: .90綜合數(shù)據(jù)/傳真/語(yǔ)音/揚(yáng)聲器調(diào)制解調(diào)器設(shè)備集
文件頁(yè)數(shù): 6/43頁(yè)
文件大?。?/td> 242K
代理商: DM560P
DM560P
V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set
6
Preliminary
Version: DM560P-DS-P07
August 11, 2000
DM6583 Pin Description
Pin No.
1 - 8
Pin Name
UD0 - UD7
I/O
I/O
Description
Data Bus Signal,
for internal modem:
These signals are connected to the data bus of the PC I/O. They are
used to transfer data between the PC and the DM6583.
Modem Control Output
, for external modem:
Memory address mapping of the controller is E800H.
I/O Read
:
An active low input signal used to read data from the DM6583.
Ground
9
/IOR
I
10, 41, 68,
85, 96
11
GND
P
/IOW
I
I/O Write:
An active low input signal used to write data to the DM6583.
Address Enable:
This is an active low signal to enable the system address for
DM6583.
System Address:
These signals are connected to the bus of PC I/O. They are used to
select DM6583 I/O ports.
A0~A7:Modem Control Input for external modem. Memory address
mapping of the controller is E800H.
+5V Power Supply
12
/AEN
I
13 - 24
A11 - A0
I
25, 36, 52,
100
26, 27, 28,
29, 33, 34,
35, 59
VDD
P
IRQ4, IRQ5,
IRQ7, IRQ10,
IRQ11, IRQ12,
IRQ15, IRQ3
O
Interrupt Request:
These are the interrupt request pins. Only one pin, which is
decoded from Configuration Register can be active. The active pin
will go high when an interrupt request is generated from the
DM6583.
Reset:
An active high signal used to reset the DM6583.
Crystal Oscillator Input
Crystal Oscillator Output
Controller Program Write Enable:
This pin is used to enable FLASH ROM programming.
In
configurations with no FLASH memory, this pin is not connected.
Loop Current Detection. Modem Input Control:
This pin is mapped to bit0 of address D000H.
RX DSP Register Select Output:
Memory address mapping of the controller is E400H.
Bank Switch Control:
These signals are used to switch external program memory
between banks.
CA16 CA17
Bank 0 0 0
Bank 1 1 0
Bank 2 0 1
Bank 3 1 1
Controller Counter 0 Input
30
RESET
I
31
32
37
XTAL1
XTAL2
/PWR
I
O
O
51
/LCS
I
39
/RUCS
O
40,38
CA16,CA17
O
42
T0
I
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