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| 型號： | DP83848CVVX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 59/86頁 |
| 文件大?。?/td> | 0K |
| 描述： | TXRX ETHERNET PHYTER 48LQFP |
| 產(chǎn)品培訓(xùn)模塊： | PHYTER® Family |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| 其它名稱： | DP83848CVVX/NOPBDKR |
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7.2.12 Energy Detect Control (EDCR)
Table 32. Energy Detect Control (EDCR), address 0x1D
Bit
Bit Name
Default
Description
15
ED_EN
0, RW
Energy Detect Enable:
Allow Energy Detect Mode.
When Energy Detect is enabled and Auto-Negotiation is disabled
via the BMCR register, Auto-MDIX should be disabled via the PHY-
CR register.
14
ED_AUTO_UP
1, RW
Energy Detect Automatic Power Up:
Automatically begin power up sequence when Energy Detect Data
Threshold value (EDCR[3:0]) is reached. Alternatively, device
could be powered up manually using the ED_MAN bit (ECDR[12]).
13
ED_AUTO_DOWN
1, RW
Energy Detect Automatic Power Down:
Automatically begin power down sequence when no energy is de-
tected. Alternatively, device could be powered down using the
ED_MAN bit (EDCR[12]).
12
ED_MAN
0, RW/SC
Energy Detect Manual Power Up/Down:
Begin power up/down sequence when this bit is asserted. When
set, the Energy Detect algorithm will initiate a change of Energy De-
tect state regardless of threshold (error or data) and timer values.
In managed applications, this bit can be set after clearing the Ener-
gy Detect interrupt to control the timing of changing the power
state.
11
ED_BURST_DIS
0, RW
Energy Detect Bust Disable:
Disable bursting of energy detect data pulses. By default, Energy
Detect (ED) transmits a burst of 4 ED data pulses each time the CD
is powered up. When bursting is disabled, only a single ED data
pulse will be send each time the CD is powered up.
10
ED_PWR_STATE
0, RO
Energy Detect Power State:
Indicates current Energy Detect Power state. When set, Energy
Detect is in the powered up state. When cleared, Energy Detect is
in the powered down state. This bit is invalid when Energy Detect
is not enabled.
9
ED_ERR_MET
0, RO/COR
Energy Detect Error Threshold Met:
No action is automatically taken upon receipt of error events. This
bit is informational only and would be cleared on a read.
8
ED_DATA_MET
0, RO/COR
Energy Detect Data Threshold Met:
The number of data events that occurred met or surpassed the En-
ergy Detect Data Threshold. This bit is cleared on a read.
7:4
ED_ERR_COUNT
0001, RW
Energy Detect Error Threshold:
Threshold to determine the number of energy detect error events
that should cause the device to take action. Intended to allow aver-
aging of noise that may be on the line. Counter will reset after ap-
proximately 2 seconds without any energy detect data events.
3:0
ED_DATA_COUNT
0001, RW
Energy Detect Data Threshold:
Threshold to determine the number of energy detect events that
should cause the device to take actions. Intended to allow averag-
ing of noise that may be on the line. Counter will reset after approx-
imately 2 seconds without any energy detect data events.
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| DP83848EVV/NOPB | 功能描述:以太網(wǎng) IC RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83848EVVX/NOPB | 功能描述:以太網(wǎng) IC 10/100 ETHERNET PHY RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| DP83848H | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:DP83848H PHYTER㈢ Mini - Extreme Single 10/100 Ethernet |
| DP83848H_07 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:DP83848H PHYTER㈢ Mini - Extreme Single 10/100 Ethernet |
| DP83848H_08 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:DP83848H PHYTER? Mini - Extreme Single 10/100 Ethernet Transceiver |
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