參數(shù)資料
型號(hào): DS2152L+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 10/97頁(yè)
文件大?。?/td> 0K
描述: IC TXRX T1 1CHIP ENHNCD 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
功能: 單芯片收發(fā)器
接口: T1
電路數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 75mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 管件
包括: DSX-1 和 CSU 線路補(bǔ)償發(fā)生器,HDLC 控制器,帶內(nèi)回路代碼發(fā)生器和檢測(cè)器
產(chǎn)品目錄頁(yè)面: 1429 (CN2011-ZH PDF)
DS2152
18 of 97
3 PARALLEL PORT
The DS2152 is controlled via either a nonmultiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by an
external microcontroller or microprocessor. The DS2152 can operate with either Intel or Motorola bus
timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola
timing will be selected. All Motorola bus signals are listed in parentheses. See the timing diagrams in the
AC Electrical Characteristics in Section 18 for more details.
4 CONTROL, ID, AND TEST REGISTERS
The operation of the DS2152 is configured via a set of 11 control registers. Typically, the control
registers are only accessed when the system is first powered up. Once the DS2152 has been initialized,
the control registers will only need to be accessed when there is a change in the system configuration.
There are two Receive Control Register (RCR1 and RCR2), two Transmit Control Registers (TCR1 and
TCR2), and seven Common Control Registers (CCR1 to CCR7). Each of the 11 registers is described in
this section.
There is a device Identification Register (IDR) at address 0Fh. The MSB of this read-only register is fixed
to a 0 indicating that the DS2152 is present. The E1 pin-for-pin compatible version of the DS2152 is the
DS2154, which also has an ID register at address 0Fh. The user can read the MSB to determine which
chip is present since in the DS2152 the MSB will be set to 0 and in the DS2154 it will be set to 1. The
lower 4 bits of the IDR are used to display the die revision of the chip.
IDR: DEVICE IDENTIFICATION REGISTER (Address = 0F Hex)
(MSB)
(LSB)
T1E1
0
ID3
ID2
ID1
ID0
SYMBOL
POSITION
NAME AND DESCRIPTION
T1E1
IDR.7
T1 or E1 Chip Determination Bit.
0 = T1 chip
1 = E1 chip
ID3
IDR.3
Chip Revision Bit 3. MSB of a decimal code that represents the
chip revision.
ID2
IDR.1
Chip Revision Bit 2.
ID1
IDR.2
Chip Revision Bit 1.
ID0
IDR.0
Chip Revision Bit 0. LSB of a decimal code that represents the
chip revision.
The two Test Registers at addresses 09 and 7D hex are used by the factory in testing the DS2152. On
power-up, the Test Registers should be set to 00 hex for the DS2152 to operate properly.
相關(guān)PDF資料
PDF描述
DS2153Q-A7+T&R IC TXRX E1 1-CHIP 5V 44-PLCC
DS2154LNA2+ IC TXRX E1 5V 100-LQFP
DS2154L IC TXRX E1 1CHIP 5V ENH 100-LQFP
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