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參數(shù)資料
| 型號(hào)： | DS2154LN |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 4/87頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TXRX E1 1CHIP 5V ENH 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | E1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 管件 |
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DS2154
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PIN
NAME
FUNCTION
38
TPOSI
Transmit Positive Data Input. Sampled on the falling edge of TCLKI for data to be
transmitted out onto the E1 line. Can be internally connected to TPOSO by tying the
LIUC pin high.
39
TNEGI
Transmit Negative Data Input. Sampled on the falling edge of TCLKI for data to be
transmitted out onto the E1 line. Can be internally connected to TNEGO by tying the
LIUC pin high.
40
TCLKI
Transmit Clock Input. Line interface transmit clock. Can be internally connected to
TCLKO by tying the LIUC pin high.
2.2 Receive Side Digital Pins
PIN
NAME
FUNCTION
78
RLINK
Receive Link Data. Updated with the full recovered E1 datastream on the rising edge
of RCLK.
79
RLCLK
Receive Link Clock. A 4kHz to 20kHz clock (Sa bits) for the RLINK output. See
Section 12 for details.
82
RCLK
Receive Clock. 2.048MHz clock that is used to clock data through the receive side
framer.
92
RCHCLK
Receive Channel Clock. A 256kHz clock that pulses high during the LSB of each
channel. Synchronous with RCLK when the receive side elastic store is disabled.
Synchronous with RSYSCLK when the receive side elastic store is enabled. Useful for
parallel to serial conversion of channel data.
1
RCHBLK
Receive Channel Block. A user-programmable output that can be forced high or low
during any of the 32 E1 channels. Synchronous with RCLK when the receive side elastic
store is disabled. Synchronous with RSYSCLK when the receive side elastic store is
enabled. Useful for blocking clocks to a serial UART or LAPD controller in applications
where not all E1 channels are used, such as Fractional E1, 384kbps service, 768kbps, or
ISDN-PRI. Also useful for locating individual channels in drop-and-insert applications,
for external per-channel loopback, and for per-channel conditioning. See Section 10 for
details.
95
RSER
Receive Serial Data. Received NRZ serial data. Updated on rising edges of RCLK
when the receive side elastic store is disabled. Updated on the rising edges of
RSYSCLK when the receive side elastic store is enabled.
98
RSYNC
Receive Sync. An extracted pulse, one RCLK wide, is output at this pin, which
identifies either frame or CAS/CRC4 multiframe boundaries. If the receive side elastic
store is enabled, then this pin can be enabled to be an input at which a frame or
multiframe boundary pulse synchronous with RSYSCLK is applied.
97
RFSYNC
Receive Frame Sync. An extracted 8kHz pulse, one RCLK wide, is output at this pin
that identifies frame boundaries.
96
RMSYNC
Receive Multiframe Sync. An extracted pulse, one RSYSCLK wide, is output at this
pin, which identifies multiframe boundaries. If the receive side elastic store is disabled,
then this output will output multiframe boundaries associated with RCLK.
85
RDATA
Receive Data. Updated on the rising edge of RCLK with the data out of the receive side
framer.
100
RSYSCLK
Receive System Clock. 1.544MHz or 2.048MHz clock. Only used when the elastic
store function is enabled. Should be tied low in applications that do not use the elastic
store. Can be burst at rates up to 8.192MHz.
94
RSIG
Receive Signaling Output. Outputs signaling bits in a PCM format. Updated on rising
edges of RCLK when the receive side elastic store is disabled. Updated on the rising
edges of RSYSCLK when the receive side elastic store is enabled. See Section 14.
99
RLOS/LOTC Receive Loss of Sync/Loss of Transmit Clock. A dual function output that is
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2154LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Enhanced E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2154LNA2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2154LNA2+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Enhanced E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2154LND2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2154LND2+ | 制造商:Maxim Integrated Products 功能描述:ENHANCED E1 SCT LQFP REVD2 IND LF - Rail/Tube |
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