參數(shù)資料
型號: DS2154LN
廠商: Maxim Integrated Products
文件頁數(shù): 58/87頁
文件大小: 0K
描述: IC TXRX E1 1CHIP 5V ENH 100-LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標準包裝: 90
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設(shè)備封裝: 100-LQFP(14x14)
包裝: 管件
DS2154
61 of 87
12.3 Internal Register Scheme Based on CRC4 Multiframe
On the receive side, there is a set of eight registers (RSiAF, RSiNAF, RRA, RSa4 to RSa8) that report the
Si and Sa bits as they are received. These registers are updated with the setting of the Receive CRC4
Multiframe bit in Status Register 2 (SR2.1). The host can use the SR2.1 bit to know when to read these
registers. The user has 2ms to retrieve the data before it is lost. The MSB of each register is the first
received. See the register descriptions below and the Transmit Data Flow diagram (Figure 14-11) for
more details.
On the transmit side, there is also a set of eight registers (TSiAF, TSiNAF, TRA, TSa4 to TSa8) that can
be programmed to insert both Si and Sa data via the Transmit Sa Bit Control Register (TSaCR). Data is
sampled from these registers with the setting of the Transmit Multiframe bit in Status Register 2 (SR2.5).
The host can use the SR2.5 bit to know when to update these registers. It has 2ms to update the data or
else the old data will be retransmitted. The MSB of each register is the first bit transmitted. See the
register descriptions below and the Transmit Data Flow diagram (Figure 14-11) for more details.
REGISTER
NAME
ADDRESS
(HEX)
FUNCTION
RSiAF
58
The 8 Si bits in the align frame
RSiNAF
59
The 8 Si bits in the non-align frame
RRA
5A
The 8 reportings of the receive remote alarm (RA)
RSa4
5B
The 8 Sa4 reported in each CRC4 multiframe
RSa5
5C
The 8 Sa5 reported in each CRC4 multiframe
RSa6
5D
The 8 Sa6 reported in each CRC4 multiframe
RSa7
5E
The 8 Sa7 reported in each CRC4 multiframe
RSa8
5F
The eight Sa8 reported in each CRC4 multiframe
TSiAF
50
The 8 Si bits to be inserted into the align frame
TSiNAF
51
The 8 Si bits to be inserted into the non-align frame
TRA
52
The 8 settings of remote alarm (RA)
TSa4
53
The 8 Sa4 settings in each CRC4 multiframe
TSa5
54
The 8 Sa5 settings in each CRC4 multiframe
TSa6
55
The 8 Sa6 settings in each CRC4 multiframe
TSa7
56
The 8 Sa7 settings in each CRC4 multiframe
TSa8
57
The 8 Sa8 settings in each CRC4 multiframe
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