參數(shù)資料
型號(hào): DS2154LN
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 61/87頁(yè)
文件大小: 0K
描述: IC TXRX E1 1CHIP 5V ENH 100-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝: 90
類(lèi)型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 管件
DS2154
64 of 87
13.1 Receive Clock and Data Recovery
The DS2154 contains a digital clock recovery system. See Figure 1-1 and Figure 13-1 for more details.
The DS2154 couples to the receive E1 shielded twisted pair or coax via a 1:1 transformer. See Table 13-2
for transformer details. The 2.048MHz clock attached at the MCLK pin is internally multiplied by 16 via
an internal PLL and fed to the clock recovery system. The clock recovery system uses the clock from the
PLL circuit to form a 16 times oversampler, which is used to recover the clock and data. This
oversampling technique offers outstanding jitter tolerance (see Figure 13-2).
Normally, the clock that is output at the RCLKO pin is the recovered clock from the E1 AMI/B8ZS
waveform presented at the RTIP and RRING inputs. When no AMI signal is present at RTIP and RRING,
a Receive Carrier Loss (LRCL) condition will occur and the RCLKO will be sourced from the clock
applied at the MCLK pin. If the jitter attenuator is either placed in the transmit path or is disabled, the
RCLKO output can exhibit slightly shorter high cycles of the clock. This is due to the highly over-
sampled digital clock recovery circuitry. If the jitter attenuator is placed in the receive path (as is the case
in most applications), the jitter attenuator restores the RCLK to being close to 50% duty cycle. See the
Receive AC Timing Characteristics in Section 16 for more details.
13.2 Transmit Waveshaping and Line Driving
The DS2154 uses a set of laser-trimmed delay lines along with a precision Digital-to-Analog Converter
(DAC) to create the waveforms that are transmitted onto the E1 line. The waveforms created by the
DS2154 meet the ITU G.703 specifications. See Figure 13-3. The user will select which waveform is to
be generated by properly programming the L2/L1/L0 bits in the Line Interface Control Register (LICR).
The DS2154 can set up in a number of various configurations depending on the application. See
Table 13-1. Line Build-Out Select in LICR
LLL
210
APPLICATION
TRANSFORMER
RETURN
LOSS
(dB)
RT ()
000
75
normal (See Note 1)
1:1.15 step-up
N.M.
0
001
120
normal
1:1.15 step-up
N.M.
0
010
75
with protection resistors
1:1.15 step-up
N.M.
8.2
011
120
with protection resistors
1:1.15 step-up
N.M.
8.2
100
75
with high return loss
1:1.15 step-up
21
27
110
75
with high return loss
1:1.36 step-up
21
18
100
120
with high return loss
1:1.36 step-up
21
27
N.M. = not meaningful
Note: This LBO is not recommended for use in the DS2154 A2 revision.
Due to the nature of the design of the transmitter in the DS2154, very little jitter (less than 0.005UIP-P
broadband from 10Hz to 100kHz) is added to the jitter present on TCLKI. Also, the waveforms that they
create are independent of the duty cycle of TCLK. The transmitter in the DS2154 couples to the E1
transmit shielded twisted pair or coax via a 1:1.15 or 1:1.36 step-up transformer as shown in Figure 13-1.
For the devices to create the proper waveforms, this transformer used must meet the specifications listed
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DS2154LND2+ 制造商:Maxim Integrated Products 功能描述:ENHANCED E1 SCT LQFP REVD2 IND LF - Rail/Tube