參數(shù)資料
型號： DS21552LN
廠商： Maxim Integrated Products
文件頁數(shù)： 48/137頁
文件大?。?/td> 0K
描述： IC TXRX T1 1-CHIP 5V 100-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
產(chǎn)品變化通告： Product Discontinuation 20/Feb/2012
標準包裝： 90
功能： 單芯片收發(fā)器
接口： E1，HDLC，J1，T1
電路數(shù)： 1
電源電壓： 4.75 V ~ 5.25 V
電流 - 電源： 75mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤
包括： DSX-1 和 CSU 線路補償發(fā)生器，HDLC 控制器，帶內(nèi)回路代碼發(fā)生器和檢測器
DS21352/DS21552
18 of 137
4.1.2 RECEIVE SIDE PINS
Signal Name:
RLINK
Signal Description:
Receive Link Data
Signal Type:
Output
Updated with either FDL data (ESF) or Fs bits (D4) or Z bits (ZBTSI) one RCLK before the start of a frame. See Section 20
for details.
Signal Name:
RLCLK
Signal Description:
Receive Link Clock
Signal Type:
Output
A 4 kHz or 2 kHz (ZBTSI) clock for the RLINK output.
Signal Name:
RCLK
Signal Description:
Receive Clock
Signal Type:
Output
1.544 MHz clock that is used to clock data through the receive side framer.
Signal Name:
RCHCLK
Signal Description:
Receive Channel Clock
Signal Type:
Output
A 192 kHz clock which pulses high during the LSB of each channel. Synchronous with RCLK when the receive side elastic
store is disabled. Synchronous with RSYSCLK when the receive side elastic store is enabled. Useful for parallel to serial
conversion of channel data.
Signal Name:
RCHBLK
Signal Description:
Receive Channel Block
Signal Type:
Output
A user programmable output that can be forced high or low during any of the 24 T1 channels. Synchronous with RCLK when
the receive side elastic store is disabled. Synchronous with RSYSCLK when the receive side elastic store is enabled. Useful for
blocking clocks to a serial UART or LAPD controller in applications where not all T1 channels are used such as Fractional T1,
384K bps service, 768K bps, or ISDN–PRI. Also useful for locating individual channels in drop–and–insert applications, for
external per–channel loopback, and for per–channel conditioning. See Section 13 page 76 for details.
Signal Name:
RSER
Signal Description:
Receive Serial Data
Signal Type:
Output
Received NRZ serial data. Updated on rising edges of RCLK when the receive side elastic store is disabled. Updated on the
rising edges of RSYSCLK when the receive side elastic store is enabled.
Signal Name:
RSYNC
Signal Description:
Receive Sync
Signal Type:
Input/Output
An extracted pulse, one RCLK wide, is output at this pin which identifies either frame (RCR2.4 = 0) or multiframe (RCR2.4 =
1) boundaries. If set to output frame boundaries then via RCR2.5, RSYNC can also be set to output double–wide pulses on
signaling frames. If the receive side elastic store is enabled via CCR1.2, then this pin can be enabled to be an input via RCR2.3
at which a frame or multiframe boundary pulse is applied. See Section 21 for details.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21552LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21554 制造商:Maxim Integrated Products 功能描述:
DS21554G 功能描述:IC TXRX E1 1-CHIP 5V 100-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標準包裝:750 系列:*
DS21554GN 功能描述:IC TXRX E1 1-CHIP 5V 100-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標準包裝:750 系列:*
DS21554L 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3/5V E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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