參數(shù)資料
型號: DS21FF42
廠商: Maxim Integrated Products
文件頁數(shù): 82/114頁
文件大?。?/td> 0K
描述: IC FRAMER T1 4X4 16CH 300-BGA
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 40
控制器類型: T1 調(diào)幀器
接口: 并行/串行
電源電壓: 2.97 V ~ 3.63 V
電流 - 電源: 300mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 300-BBGA
供應商設備封裝: 300-PBGA(27x27)
包裝: 管件
DS21FT42/DS21FF42
7 of 114
PIN
SYMBOL
I/O
DESCRIPTION
R16
DVSS3
Digital Signal Ground for Framer 3.
Y20
DVSS3
Digital Signal Ground for Framer 3.
J20
DVSS4/NC
Digital Signal Ground for Framer 4. NC on Four x Three.
A11
DVSS4/NC
Digital Signal Ground for Framer 4. NC on Four x Three.
D19
DVSS4/NC
Digital Signal Ground for Framer 4. NC on Four x Three.
Y14
FS0
I
Framer Select 0 for the Parallel Control Port.
W14
FS1
I
Framer Select 1 for the Parallel Control Port.
G16
INT*
O
Interrupt for all four Quad Framers.
V14
JTCLK
I
JTAG Clock.
E10
JTDI
I
JTAG Data Input.
A19
JTDOF/NC
O
JTAG Data Output for Four x Four Version. NC on Four x
Three.
T17
JTDOT
O
JTAG Data Output for Four x Three Version.
H16
JTMS
I
JTAG Test Mode Select.
K17
JTRST*
I
JTAG Reset.
A13
TEST
I
Tri-State. 0 = do not tri-state / 1 = tri-state all outputs & I/O
signals
P17
MUX
I
Bus Operation Select.
0 = non-multiplexed bus / 1 =
multiplexed bus
C2
RCHBLK1
O
Receive Channel Blocking Clock.
G3
RCHBLK2
O
Receive Channel Blocking Clock.
E6
RCHBLK3
O
Receive Channel Blocking Clock.
A8
RCHBLK4
O
Receive Channel Blocking Clock.
N1
RCHBLK5
O
Receive Channel Blocking Clock.
Y1
RCHBLK6
O
Receive Channel Blocking Clock.
U6
RCHBLK7
O
Receive Channel Blocking Clock.
N5
RCHBLK8
O
Receive Channel Blocking Clock.
Y8
RCHBLK9
O
Receive Channel Blocking Clock.
W12
RCHBLK10
O
Receive Channel Blocking Clock.
V17
RCHBLK11
O
Receive Channel Blocking Clock.
U17
RCHBLK12
O
Receive Channel Blocking Clock.
D16
RCHBLK13/NC
O
Receive Channel Blocking Clock. NC on Four x Three.
K20
RCHBLK14/NC
O
Receive Channel Blocking Clock. NC on Four x Three.
B18
RCHBLK15/NC
O
Receive Channel Blocking Clock. NC on Four x Three.
B16
RCHBLK16/NC
O
Receive Channel Blocking Clock. NC on Four x Three.
A2
RCLK1
I
Receive Clock for Framer 1
K1
RCLK2
I
Receive Clock for Framer 2.
D10
RCLK3
I
Receive Clock for Framer 3.
B9
RCLK4
I
Receive Clock for Framer 4.
M3
RCLK5
I
Receive Clock for Framer 5.
V1
RCLK6
I
Receive Clock for Framer 6.
W6
RCLK7
I
Receive Clock for Framer 7.
J3
RCLK8
I
Receive Clock for Framer 8.
T9
RCLK9
I
Receive Clock for Framer 9.
W10
RCLK10
I
Receive Clock for Framer 10.
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