參數(shù)資料
型號: DS21Q42T
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PQFP128
封裝: TQFP-128
文件頁數(shù): 61/119頁
文件大?。?/td> 1309K
代理商: DS21Q42T
DS21Q42
46 of 119
Path Code Violation Count Register
(PCVCR) When the receive side of a framer is set to operate in the ESF framing mode (CCR2.3=1),
PCVCR will automatically be set as a 12–bit counter that will record errors in the CRC6 code words.
When set to operate in the D4 framing mode (CCR2.3=0), PCVCR will automatically count errors in the
Ft framing bit position. Via the RCR2.1 bit, a framer can be programmed to also report errors in the Fs
framing bit position. The PCVCR will be disabled during receive loss of synchronization (RLOS=1)
conditions. See Table 8-2 for a detailed description of exactly what errors the PCVCR counts.
PCVCR1: PATH VIOLATION COUNT REGISTER 1 (Address = 25 Hex)
PCVCR2: PATH VIOLATION COUNT REGISTER 2 (Address = 26 Hex)
(MSB)
(LSB)
(note 1)
CRC/
FB11
CRC/
FB10
CRC/
FB9
CRC/
FB8
PCVCR1
CRC/
FB7
CRC/
FB6
CRC/
FB5
CRC/
FB4
CRC/
FB3
CRC/
FB2
CRC/
FB1
CRC/
FB0
PCVCR2
SYMBOL
POSITION
NAME AND DESCRIPTION
CRC/FB11
PCVCR1.3
MSB of the 12–Bit CRC6 Error or Frame Bit Error
Count (note#2)
CRC/FB0
PCVCR2.0
LSB of the 12–Bit CRC6 Error or Frame Bit Error Count
(note#2)
Notes:
1. The upper nibble of the counter at address 25 is used by the Multiframes Out of Sync Count Register
2. PCVCR counts either errors in CRC code words (in the ESF framing mode; CCR2.3=1) or errors in
the framing bit position (in the D4 framing mode; CCR2.3=0).
PATH CODE VIOLATION COUNTING ARRANGEMENTS Table 8-2
FRAMING MODE
(CCR2.3)
COUNT Fs ERRORS?
(RCR2.1)
WHAT IS COUNTED IN THE
PCVCRs
D4
no
errors in the Ft pattern
D4
yes
errors in both the Ft & Fs
patterns
ESF
don’t care
errors in the CRC6 code words
相關(guān)PDF資料
PDF描述
DS21Q43AT DATACOM, FRAMER, PQFP128
DS21Q44T DATACOM, FRAMER, PQFP128
DS21Q44TN DATACOM, FRAMER, PQFP128
DS21Q48N DATACOM, PCM TRANSCEIVER, PBGA144
DS21Q48 DATACOM, PCM TRANSCEIVER, PBGA144
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