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參數(shù)資料
| 型號： | DS21Q48 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/73頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1/T1/J1 QUAD 5V 144-BGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | E1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-BBGA |
| 供應(yīng)商設(shè)備封裝： | 144-PBGA（17x17） |
| 包裝： | 管件 |
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DS2148/DS21Q48
19 of 73
NAME
PIN
I/O
FUNCTION
NRZE
3
I
NRZ Enable [H/W Mode]
0 = Bipolar data at RPOS/RNEG and TPOS/TNEG
1 = NRZ data at RPOS and TPOS or TNEG; RNEG outputs a positive going
pulse when device receives a BPV, CV, or EXZ.
PBEO
24
O
PRBS Bit Error Output. The receiver will constantly search for a QRSS (T1)
or a 215-1 (E1) PRBS depending on whether T1 or E1 mode is selected. Remains
high if out of synchronization with the PRBS pattern. Goes low when
synchronized to the PRBS pattern. Any errors in the received pattern after
synchronization will cause a positive going pulse (with same period as E1 or T1
clock) synchronous with RCLK.
RCLK
40
O
Receive Clock. Buffered recovered clock from the line. Synchronous to MCLK
in absence of signal at RTIP and RRING.
RCL
25
O
Receive Carrier Loss. An output which will toggle high during a receive carrier
loss.
RNEG
39
O
Receive Negative Data. Updated on the rising edge (CES = 0) or the falling
edge (CES = 1) of RCLK with the bipolar data out of the line interface. Set
NRZE to a one for NRZ applications. In NRZ mode, data will be output on
RPOS while a received error will cause a positive-going pulse synchronous with
RCLK at RNEG. See Section 6.4 for details.
RPOS
38
O
Receive Positive Data. Updated on the rising edge (CES = 0) or the falling edge
(CES = 1) of RCLK with bipolar data out of the line interface. Set NRZE pin to a
one for NRZ applications. In NRZ mode, data will be output on RPOS while a
received error will cause a positive-going pulse synchronous with RCLK at
RNEG. See Section 6.4 for details.
RT0/RT1
44/23
I
Receive LIU Termination Select Bits 0 & 1 [H/W Mode]. These inputs
determine the receive termination. See Table 2-12.
RTIP/
RRING
27/28
I
Receive Tip and Ring. Analog inputs for clock recovery circuitry. These pins
connect via a 1:1 transformer to the line. See Section 5 for details.
SCLKE
4
I
Receive & Transmit Synchronization Clock Enable.
0 = disable 2.048MHz synchronization transmit and receive mode
1 = enable 2.048MHz synchronization transmit and receive mode
TCLK
43
I
Transmit Clock. A 2.048MHz or 1.544MHz primary clock. Used to clock data
through the transmit side formatter.
TEST
26
I
Tri-State Control. Set high to tri-state all outputs and I/O pins (including the
parallel control port). Set low for normal operation. Useful in board level testing.
TNEG
42
I
Transmit Negative Data. Sampled on the falling edge (CES = 0) or the rising
edge (CES = 1) of TCLK for data to be transmitted out onto the line.
TPD
13
I
Transmit Power-Down
0 = normal transmitter operation
1 = powers down the transmitter and tri-states the TTIP and TRING pins
TPOS
41
I
Transmit Positive Data. Sampled on the falling edge (CES = 0) or the rising
edge (CES = 1) of TCLK for data to be transmitted out onto the line.
TTIP/
TRING
34/37
O
Transmit Tip and Ring. Analog line driver outputs. These pins connect via a
step-up transformer to the line. See Section 5 for details.
TX0/TX1
14/15
I
Transmit Data Source Select Bits 0 & 1 [H/W Mode]. These inputs determine
the source of the transmit data. See Table 2-9.
VDD
21/36
-
5.0V ±5% Positive Supply
VSM
20
I
Voltage Supply Mode. Should be tied high for 5V operation
VSS
22/35
-
Signal Ground
Note 1: G.703 requires an accuracy of ±50ppm for both T1 and E1. TR62411 and ANSI specs require an accuracy of ±32ppm for T1
interfaces.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21Q48A3N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48B | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48C | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48NB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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