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參數(shù)資料
| 型號(hào)： | DS21Q48 |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 27/73頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1/T1/J1 QUAD 5V 144-BGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | E1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-BBGA |
| 供應(yīng)商設(shè)備封裝： | 144-PBGA（17x17） |
| 包裝： | 管件 |
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DS2148/DS21Q48
33 of 73
Table 4-5. Internal Rx Termination Select
RT1
(CCR5.1)
RT0
(CCR5.0)
INTERNAL RECEIVE
TERMINATION CONFIGURATION
0
Internal receive-side termination disabled
0
1
Internal receive-side 120
enabled
1
0
Internal receive-side 100
enabled
1
Internal receive-side 75
enabled
CCR6 (05H): COMMON CONTROL REGISTER 6
(MSB)
(LSB)
LLB
RLB
ARLBE
ALB
RJAB
ECRS2
ECRS1
ECRS0
SYMBOL
POSITION
DESCRIPTION
LLB
CCR6.7
Local Loopback. In Local Loopback (LLB), transmit data will be
looped back to the receive path passing through the jitter attenuator if it
is enabled. Data in the transmit path will act as normal. See Figure 1-1
and Section 6.2.2 for details.
0 = loopback disabled
1 = loopback enabled
RLB
CCR6.6
Remote Loopback. In Remote Loopback (RLB), data output from the
clock/data recovery circuitry will be looped back to the transmit path
passing through the jitter attenuator if it is enabled. Data in the receive
path will act as normal while data presented at TPOS and TNEG will be
ignored. See Figure 1-1 and Section 6.2.1 for details.
0 = loopback disabled
1 = loopback enabled
ARLBE
CCR6.5
Automatic Remote Loopback Enable and Reset. When this bit is set
high, the device will automatically go into remote loopback when it
detects loop-up code programmed into the receive loop-up code
definition registers (RUPCD1 and RUPCD2) for a minimum of 5
seconds and it will also set the RIR2.1 status bit. Once in a RLB state, it
will remain in this state until it has detected the loop code programmed
into the receive loop-down code definition registers (RDNCD1 and
RDNCD2) for a minimum of 5 seconds at which point it will force the
device out of RLB and clear RIR2.1. Toggling this bit from a 1 to a 0
can reset the automatic RLB circuitry. The action of the automatic
remote loopback circuitry is logically ORed with the RLB (CCR6.6)
control bit (i.e., either one can cause a RLB to occur).
ALB
CCR6.4
Analog Loopback. In analog loopback (ALB), signals at TTIP and
TRING will be internally connected to RTIP and RRING. The incoming
signals, from the line, at RTIP and RRING will be ignored. The signals
at TTIP and TRING will be transmitted as normal. See Figure 1-1 and
Section 6.2.3 for more details.
0 = loopback disabled
1 = loopback enabled
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| DS21Q48A3N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48B | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48C | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q48NB | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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