參數(shù)資料
型號(hào)： DS21Q50LN
廠商： Maxim Integrated Products
文件頁數(shù)： 18/87頁
文件大小： 0K
描述： IC TRANSCEIVER E1 QD IND 100LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
產(chǎn)品變化通告： Product Discontinuation 20/Feb/2012
標(biāo)準(zhǔn)包裝： 90
功能： 收發(fā)器
接口： E1
電路數(shù)： 4
電源電壓： 3.14 V ~ 3.47 V
電流 - 電源： 230mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 托盤
包括： AIS 警報(bào)檢測(cè)器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測(cè)器，遠(yuǎn)程檢測(cè)器和發(fā)生器
DS21Q50
25 of 87
4.1 Power-Up Sequence
On power-up and after the supplies are stable, the DS21Q50 should be configured for operation by
writing to all of the internal registers (this includes setting the test registers to 00h) since the contents of
the internal registers cannot be predicted on power-up. The LIRST (CCR5.4) should be toggled from 0 to
1 to reset the line interface circuitry (it takes the device about 40ms to recover from the LIRST bit being
toggled). Finally, after the SYSCLK input is stable, the ESR bits (CCR4.5 and CCR4.6) should be
toggled from a 0 to 1 (this step can be skipped if the elastic store is disabled).
Register Name:
RCR
Register Description:
Receive Control Register
Register Address:
10 Hex
Bit
7
6
5
4
3
2
1
0
Name
RSMF
RSM
RSIO
RESE
—
FRC
SYNC
RESYNC
NAME
BIT
FUNCTION
RSMF
7
RSYNC Multiframe Function. Only used if the RSYNC pin is programmed in the
multiframe mode (RCR.6 = 1).
0 = RSYNC outputs CAS multiframe boundaries
1 = RSYNC outputs CRC4 multiframe boundaries
RSM
6
RSYNC Mode Select.
0 = frame mode (See the timing diagrams in Section 19.1.)
1 = multiframe mode (See the timing diagrams in Section 19.1.)
RSIO
5
RSYNC I/O Select. (Note: This bit must be set to 0 when RCR .4 = 0).
0 = RSYNC is an output (depends on RCR.6)
1 = RSYNC is an input (only valid if elastic store enabled)
RESE
4
Receive Elastic Store Enable
0 = elastic store is bypassed
1 = elastic store is enabled
—
3
Unused. Should be set = 0 for proper operation
FRC
2
Frame Resync Criteria
0 = resync if FAS received in error three consecutive times
1 = resync if FAS or bit 2 of non-FAS is received in error three consecutive times
SYNCE
1
Sync Enable
0 = auto resync enabled
1 = auto resync disabled
RESYNC
0
Resync. When toggled from low to high, a resync is initiated. Must be cleared and
set again for a subsequent resync.
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