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參數(shù)資料
型號: DS26504LNB2+
廠商: Maxim Integrated Products
文件頁數(shù): 27/129頁
文件大?。?/td> 0K
描述: IC T1/E1/J1 64KCC ELEMENT 64LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 160
功能: BITS 元件
接口: 64KCC,E1,T1
電路數(shù): 1
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 150mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 管件
包括: *
其它名稱: 90-26504+NB2
DS26504 T1/E1/J1/64KCC BITS Element
122 of 129
20.3 Serial Bus
Table 20-3. AC Characteristics, Serial Bus
(VDD = 3.3V ±5%, TA = 0°C to +70°C for DS26504L; VDD = 3.3V ±5%, TA = -40°C to +85°C for
DS26504LN.) (Note 1) (Figure 20-8 and Figure 20-9)
CHARACTERISTIC (Note 3)
SYMBOL
MIN MAX UNITS
DIAGRAM
NUMBER
(Note 2)
Operating Frequency
Slave
fBUS(S)
10
MHz
1
Cycle Time: Slave
tCYC(S)
100
ns
2
Enable Lead Time
tLEAD(S)
15
ns
3
Enable Lag Time
tLAG(S)
15
ns
4
Clock (CLK) High Time
Slave
tCLKH(S)
50
ns
5
Clock (CLK) Low Time
Slave
tCLKL(S)
50
ns
6
Data Setup Time (inputs)
Slave
tSU(S)
5
ns
7
Data Hold Time (inputs)
Slave
tH(S)
15
ns
CPHA = 0
tA(CP0)
0
40
8
Access Time, Slave
(Note 4)
CPHA = 1
tA(CP1)
0
20
ns
9
Disable Time, Slave (Note 5)
tDIS(S)
25
ns
10
Data Valid Time, After Enable Edge
Slave (Note 6)
tV(S)
40
ns
11
Data Hold Time, Outputs, After Enable Edge
Slave
tHD(S)
5
ns
Note 1:
The timing parameters in this table are guaranteed by design (GBD).
Note 2:
Numbers refer to dimensions in Figure 20-8 and Figure 20-9.
Note 3:
All timing is shown with respect to 20% VDD and 70% VDD, unless otherwise noted. 100pF load on all SPI pins.
Note 4:
Time to data active from high-impedance state.
Note 5:
Hold time to high-impedance state.
Note 6:
With 100pF on all SPI pins.
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