參數(shù)資料
型號: DS26504LNB2+
廠商: Maxim Integrated Products
文件頁數(shù): 46/129頁
文件大?。?/td> 0K
描述: IC T1/E1/J1 64KCC ELEMENT 64LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 160
功能: BITS 元件
接口: 64KCC,E1,T1
電路數(shù): 1
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 150mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 管件
包括: *
其它名稱: 90-26504+NB2
DS26504 T1/E1/J1/64KCC BITS Element
23 of 129
MODE
PIN
TYPE
PARALLEL
PORT
SERIAL
PORT
HARDWARE
FUNCTION
18
O
TCLKO
Transmit Clock Output
19
O
TNEGO
Transmit Negative-Data Output
20
O
TPOSO
Transmit Positive-Data Output
21
I
TSER
Transmit Serial Data
23
I/O
TS_8K_4
T1/E1 Mode: Transmit Frame/Multiframe Sync
64KCC Mode: Transmit 8kHz or 400Hz Sync
25
O
RCLK
Receive Clock
26
O
RS_8K
T1/E1 Mode: Receive Frame/Multiframe Boundary
64KCC Mode: Receive 8kHz Output
27
O
400HZ
400Hz Output in Composite Clock Mode
28
O
RSER
Receive Serial Data
29
O
RAIS
Receive Alarm Indication Signal
30
O
RLOF_CCE
Receive Loss of Frame_Composite Clock Error
31
I
TCSS1
Parallel Port Mode: Unused, should be connected to
VSS.
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Transmit Clock Source Select 1
32
O
RLOS
Receive Loss of Signal
33
I
JTMS
IEEE 1149.1 Test Mode Select
34
I
JTCLK
IEEE 1149.1 Test Clock Signal
35
I
JTRST
IEEE 1149.1 Test Reset
36
I
JTDI
IEEE 1149.1 Test Data Input
37
O
JTDO
IEEE 1149.1 Test Data Output
38
I
RVDD
Receive Analog Positive Supply
39
I
TSTRST
Test/Reset
40,
43, 45
I
RVSS
Receive Analog Signal Ground
41
I
RTIP
Receive Analog Tip Input
42
I
RRING
Receive Analog Ring Input
44
I
MCLK
Master Clock Input
46
I/O
INT
JACKS0
Parallel Port Mode: Interrupt
Serial Port Mode: Interrupt
Hardware Mode: Jitter Attenuator Clock Select 0
47
O
PLL_OUT
Transmit PLL (TX PLL) Clock Output
48
I
TMODE2
Parallel Port Mode: Unused, should be connected to
VSS.
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Transmit Mode Select 2
49
I
TMODE1
Parallel Port Mode: Unused, should be connected to
VSS.
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Transmit Mode Select 1
50
I
THZE
Transmit High-Impedance Enable
51
O
TTIP
Transmit Analog Tip Output
52
I
TVSS
Transmit Analog Signal Ground
53
I
TVDD
Transmit Analog Positive Supply
54
O
TRING
Transmit Analog Ring Output
55
I
BTS
HBE
Parallel Port Mode: Bus Type Select (Motorola/Intel)
Serial Port Mode: Unused, should be connected to VSS.
Hardware Mode: Receive and Transmit HDB3/B8ZS
Enable
57
I
BIS0
Bus Interface Select Mode 0
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