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參數(shù)資料
| 型號： | DS28CM00R-A00+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/9頁 |
| 文件大小： | 0K |
| 描述： | IC SILICON SERIAL NUMBER SOT23-5 |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 類型： | 硅序列號 |
| 應用： | PCB，網(wǎng)絡節(jié)點，設備識別/注冊 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SC-74A，SOT-753 |
| 供應商設備封裝： | SOT-23-5 |
| 包裝： | 標準包裝 |
| 其它名稱： | DS28CM00R-A00+TDKR |
DS28CM00: IC/SMBus Silicon Serial Number
2 of 9
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground
-0.5V, +6V
Maximum Current Into Any Pin
±20mA
Operating Temperature Range
-40°C to +85°C
Junction Temperature
+150°C
Storage Temperature Range
-55°C to +125°C
Soldering Temperature
See IPC/JEDEC J-STD-020
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is
not implied. Exposure to the absolute maximum rating conditions for extended periods may affect device.
ELECTRICAL CHARACTERISTICS
(-40°C to +85°C, see Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VCC
1.62
5.25
V
Standby Current
ICCS
Bus idle, VCC = 5.25V
3
A
Operating Current
ICCA
Bus active at 400kHz, VCC
= 5.25V
200
A
SCL, SDA Pins (Note 2) See Figure 5
VCC ≥ 2.0V
-0.3
0.3 ×
VCC
LOW Level Input Voltage
VIL
VCC < 2.0V
-0.3
0.25 ×
VCC
V
VCC ≥ 2.0V
0.7 ×
VCC
VCCmax +
0.3V
HIGH Level Input Voltage
(Note 3)
VIH
VCC < 2.0V
0.8 ×
VCC
VCCmax +
0.3V
V
VCC ≥ 2.0V
0.05 ×
VCC
Hysteresis of Schmitt Trigger
Inputs (Note 4)
Vhys
VCC < 2.0V
0.1 ×
VCC
V
LOW Level Output Voltage at
4mA Sink Current
VOL
0.4
V
VCC ≥ 2.0V
20 +
0.1Cb
250
Output Fall Time from VIhmin to
VILmax with a Bus Capacitance
from 10pF to 400pF (Notes 4,
5)
tof
VCC < 2.0V
20 +
0.1Cb
450
ns
Pulse Width of Spikes that are
Suppressed by the Input Filter
tSP
SDA and SCL pins only
(Note 4)
50
ns
Input Current with an Input
Voltage Between 0.1VCC and
0.9VCCmax
Ii
(Note 6)
-10
10
A
Input Capacitance
Ci
(Note 4)
10
pF
VCC ≥ 2.0V
400
SCL Clock Frequency (Note 7)
fSCL
VCC < 2.0V
344
kHz
Bus Time-out
tTIMEOUT
(Note 7)
25
75
ms
Hold Time (Repeated) START
Condition. After this Period, the
First Clock Pulse is Generated.
tHD:STA
(Note 8)
0.6
s
VCC ≥ 2.7V
1.3
VCC ≥ 2.0V
1.5
LOW Period of the SCL Clock
(Note 8)
tLOW
VCC < 2.0V
2.3
s
HIGH Period of the SCL Clock
tHIGH
(Note 8)
0.6
s
Setup Time for a Repeated
START Condition
tSU:STA
(Note 8)
0.6
s
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