- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄1915 > DS3170+ (Maxim Integrated Products)IC TXRX DS3/E3 100-CSBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | DS3170+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 8/230頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX DS3/E3 100-CSBGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 640 |
| 功能： | 單芯片收發(fā)器 |
| 接口： | DS3，E3 |
| 電路數(shù)： | 1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 電流 - 電源： | 120mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LBGA，CSBGA |
| 供應(yīng)商設(shè)備封裝： | 100-CSBGA（11x11） |
| 包裝： | 托盤(pán) |
| 包括： | DS3 調(diào)幀器，E3 調(diào)幀器，HDLC 控制器，芯片內(nèi) BERT |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)
DS3170 DS3/E3 Single-Chip Transceiver
105 of 230
Figure 10-24. Line Encoder/Decoder Block Diagram
DS3/E3
Transmit
LIU
IEEE P1149.1
JTAG Test
Access Port
Microprocessor
Interface
HDLC
FEAC
LLB
DL
B
DS3 / E3
Transmit
Formatter
DS3 / E3
Receive
Framer
Trail
Trace
Buffer
DS3/E3
Receive
LIU
TAIS
TUA1
Clock Rate
Adapter
TX BERT
RX BERT
PL
B
AL
B
UA1
GEN
B3ZS/
HDB3
Encoder
B3ZS/
HDB3
Decoder
10.10.2 Features
Performs bipolar to unipolar encoding and decoding – Converts a unipolar signal into an AMI bipolar signal
(POS data, and NEG data) and vice versa.
Programmable zero suppression – B3ZS or HDB3 zero suppression encoding and decoding can be
performed, or the bipolar data stream can be left as an AMI encoded data stream.
Programmable receive zero suppression code format – The signature of B3ZS or HDB3 is selectable.
Generates and detects alarms and errors – In the receive direction, detects LOS alarm condition BPV
errors, and EXZ errors. In the transmit direction, errors can be inserted into the outgoing data stream.
10.10.3 B3ZS/HDB3 Encoder
B3ZS/HDB3 Encoder performs unipolar to bipolar conversion and zero suppression encoding.
Unipolar to bipolar conversion converts the unipolar data stream into an AMI bipolar data stream (POS and NEG).
In an AMI bipolar data stream a zero is represented by a zero on both the POS and NEG signals, and a one is
represented by a one on a bipolar signal (POS or NEG), and a zero on the other bipolar signal (NEG or POS).
Successive ones are represented by ones that are alternately output on the POS and NEG signals. i.e., if a one is
represented by a one on POS and a zero on NEG, the next one will be represented by a one on NEG and a zero
on POS.
Zero suppression encoding converts an AMI bipolar data stream into a B3ZS or HDB3 encoded bipolar data
stream. A B3ZS encoded bipolar signal is generated by inserting a B3ZS signature into the bipolar data stream if
both the POS and NEG signals are zero for three consecutive clock periods. An HDB3 encoded bipolar signal is
generated by inserting an HDB3 signature into the bipolar data stream if both the POS and NEG signals are zero
for four consecutive clock periods. Zero suppression encoding can be disabled which will result in AMI-coded data.
Error insertion is also performed. Error insertion inserts bipolar violation (BPV) or excessive zero (EXZ) errors onto
the bipolar signal. A BPV error will be inserted when three consecutive ones occur. An EXZ error will be inserted
when three (or four) consecutive zeros on the bipolar signal occur by inhibiting the insertion of a B3ZS (HDB3)
signature. There will be at least one intervening pulse between consecutive BPV or EXZ errors. A single BPV or
EXZ error inserted will be detected as a single BPV/EXZ error at the far-end, and will not cause any other type of
error to be detected. For example, if a BPV error is inserted, the far-end should not also detect a data error.
10.10.4 Transmit Line Interface
The Transmit Line Interface accepts a bipolar data stream from the B3ZS/HDB3 Encoder, performs error insertion,
and transmits the bipolar data stream.
Error insertion inserts BPV or EXZ errors into the bipolar signal. When a BPV error is to be inserted, the Transmit
Line Interface waits for the next occurrence of three consecutive ones. The first bipolar one is generated according
to the normal AMI rules. The second bipolar one is generated by transmitting the same values on TPOS and TNEG
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS3172N+ | IC TXRX DS3/E3 DUAL 400-BGA |
| DS3181N+ | IC ATM/PACKET PHY W/LIU 400PBGA |
| DS32512N+ | IC LIU DS3/E3/STS-1 12P 484-BGA |
| DS3254N+ | IC LIU DS3/E3/STS-1 144-CSBGA |
| DS33M33N+ | IC MAPPER ETHERNET 256CSBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3170_11 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:DS3/E3 Single-Chip Transceiver Single-Chip Transceiver for DS3 and E3 |
| DS3170+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC DS3/E3 Single-Chip Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3170DK | 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 DS3170 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
| DS3170L | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:DS3/E3 Single-Chip Transceiver |
| DS3170LN | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:DS3/E3 Single-Chip Transceiver |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。