參數(shù)資料
型號(hào)： DS3254
英文描述： Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
中文描述： 單/雙/三/四路、DS3/E3/STS-1 LIU
文件頁數(shù)： 41/71頁
文件大?。?/td> 925K
代理商： DS3254
DS3251/DS3252/DS3253/DS3254
41 of 71
sequence for the instruction register. JTMS high during a rising edge on JTCLK puts the controller back into the
Test-Logic-Reset state.
Capture-IR.
The Capture-IR state is used to load the shift register in the instruction register with a fixed value. This
value is loaded on the rising edge of JTCLK. If JTMS is high on the rising edge of JTCLK, the controller enters the
Exit1-IR state. If JTMS is low on the rising edge of JTCLK, the controller enters the Shift-IR state.
Shift-IR.
In this state, the instruction register’s shift register is connected between JTDI and JTDO and shifts data
one stage for every rising edge of JTCLK toward the serial output. The parallel register and the test registers
remain at their previous states. A rising edge on JTCLK with JTMS high moves the controller to the Exit1-IR state.
A rising edge on JTCLK with JTMS low keeps the controller in the Shift-IR state, while moving data one stage
through the instruction shift register.
Exit1-IR.
A rising edge on JTCLK with JTMS low puts the controller in the Pause-IR state. If JTMS is high on the
rising edge of JTCLK, the controller enters the Update-IR state and terminates the scanning process.
Pause-IR.
Shifting of the instruction register is halted temporarily. With JTMS high, a rising edge on JTCLK puts
the controller in the Exit2-IR state. The controller remains in the Pause-IR state if JTMS is low during a rising edge
on JTCLK.
Exit2-IR.
A rising edge on JTCLK with JTMS high puts the controller in the Update-IR state. The controller loops
back to the Shift-IR state if JTMS is low during a rising edge of JTCLK in this state.
Update-IR.
The instruction shifted into the instruction shift register is latched into the parallel output on the falling
edge of JTCLK as the controller enters this state. Once latched, this instruction becomes the current instruction. A
rising edge on JTCLK with JTMS low puts the controller in the Run-Test-Idle state. With JTMS high, the controller
enters the Select-DR-Scan state.
Figure 16-1. JTAG Block Diagram
BOUNDARY
SCAN
REGISTER
IDENTIFICATION
REGISTER
BYPASS
REGISTER
INSTRUCTION
REGISTER
TEST ACCESS PORT
CONTROLLER
M
SELECT
TRI-STATE
JTDI
10k
JTMS
10k
JTCLK
JTRST
10k
JTDO
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3254+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3254A3 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3254A3+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3254DK 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS3254 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS3254N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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