- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1916 > DS8007A-EAG+ (Maxim Integrated Products)IC INTERFACE SMART CARD 48-LQFP PDF資料下載
參數(shù)資料
| 型號： | DS8007A-EAG+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC INTERFACE SMART CARD 48-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 104 |
| 應(yīng)用： | 智能卡 |
| 接口： | 并聯(lián) |
| 電源電壓： | 2.7 V ~ 6 V |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁
DS8007A
Multiprotocol Dual Smart Card Interface
18
______________________________________________________________________________________
Bit 4: Power-Down Mode Enable (PDWN). This bit
controls entry into the power-down mode. Power-down
mode can only be entered if the SUPL bit has been
cleared. When PDWN is set to 1, the XTAL1 and XTAL2
crystal oscillator is stopped, and basic functions such
as the sequencers are supported by the internal ring
oscillator. The UART is put in a suspended state, and
the clocks to the UART, the ETU unit, and the timeout
counter are gated off. During the power-down mode, it
is not possible to select a card other than the one cur-
rently selected (advisory to the programmer, selecting
another card during power-down mode is not recom-
mended). There are five ways of exiting the power-
down mode:
Insertion of card A or card B (detected by PRLA or
PRLB).
Withdrawal of card A or card B (detected by PRLA
or PRLB).
Reassertion of the CS pin to select the DS8007A
(CS must be deasserted after setting PDWN = 1 for
this event to exit from power-down).
INTAUXL bit is set due to change in INTAUX
(INTAUXL bit must be cleared first).
Clearing of PDWN bit by software (if CS pin is
always tied to 0).
Except in the case of a read operation of register HSR,
the INT pin remains asserted in the active-low state.
The host device can read the status registers after the
oscillator warmup time, and the INT signal returns to
the high state.
Bit 3: Synchronous/Asynchronous Card Select
(SAN). This bit selects whether a synchronous or asyn-
chronous card interface is enabled. When this bit is
cleared to 0, an asynchronous card interface is expect-
ed. When this bit is set to 1, a synchronous interface is
expected. In synchronous mode, the UART is
bypassed; the SC bit controls the CLK, and I/O is trans-
acted in the LSb of UTR/URR. Card interface AUX can-
not operate in the true synchronous mode since it does
not have a CLK signal to accompany I/OAUX. However,
the SAN bit invokes the same control of I/OAUX through
UTR/URR as is given for card interfaces A and B.
Bit 2: Auto Convention Disable (AUTOC). This active-
low bit controls whether the decoding convention
should automatically be detected during the first
received character in answer-to-reset (ATR). If AUTOC
= 0, the character decoding convention is automatically
detected (while SS = 1) and the UCR1.CONV bit is writ-
ten accordingly by hardware. If AUTOC = 1, the
UCR1.CONV bit must be set by software to assign the
character decoding convention. The AUTOC bit must
not be changed during a card session.
Bit 1: Clock UART Doubler Enable (CKU). This bit
enables the effective ETU defined for the UART to last
half the number of clock cycles defined by the
AC2–AC0 and PD7–PD0 configuration (except in the
case when AC2–AC0 = 000b, where fCLK = fXTAL).
When CKU is cleared to 0, the AC2–AC0 defined fCLK
is used for ETU timing generation. When CKU is set to
1, a clock frequency of 2 x fCLK is used for ETU gener-
ation.
Bit 0: Prescaler Select (PSC). When PSC = 0, the
prescaler value is 31. When PSC = 1, the prescaler
value is 32.
Guard Time Register (GTR)
R = unrestricted read, W = unrestricted write, -n = value after reset; all bits unaffected by RIU = 0.
76
54
32
1
0
Address 05h
GTR.7
GTR.6
GTR.5
GTR.4
GTR.3
GTR.2
GTR.1
GTR.0
RW-0
Bits 7 to 0: Guard Time Register Bits 7 to 0 (GTR.7
to GTR.0). These bits are used for storing the number
of guard time units (ETU) requested during ATR. When
transmitting, the DS8007A UART delays these numbers
of extra guard time ETU before transmitting a character
written to UTR.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS8023-RRX+ | IC INTERFACE SMART CARD 28-SOIC |
| DS80C310-ECG | IC MCU HI SPEED 25MHZ 44-TQFP |
| DS80C320-ECL/T&R | IC MCU HI SPEED 33MHZ 44-TQFP |
| DS80C390-FNR | IC MPU CAN DUAL HS IND 64-LQFP |
| DS80C400-FNY | IC MCU 75MHZ 16MB HP 100-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS8007A-EAG+ | 功能描述:接口 - 專用 Multiprotocol Dual Smart Card Interface RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| DS8007A-EAG+T | 功能描述:接口 - 專用 Multiprotocol Dual Smart Card Interface RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| DS8007-ENG | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Multiprotocol Dual Smart Card Interface |
| DS8007-ENG+ | 功能描述:接口 - 專用 Multiprotocol Dual Smart Card Interface RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59 |
| DS8007-KIT | 功能描述:界面開發(fā)工具 DS8007 Eval Kit RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。