
DS80C390
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110199
Each of the message centers is identical with the exception of message center 15. Message center 15 has
been designed as a receive only center and is also buffered through the use of a two message FIFO to help
prevent message loss in a message overrun situation. The receipt of a third message before either of the
first two are read will overwrite the second message, leaving the first message undisturbed.
Modification of the CAN registers located in MOVX memory is protected via the SWINT bits, with one
bit protecting each respective CAN module. Consult the description of this bit in the User’s Guide for
more information. Each CAN Module contains a block of Control/Status/Mask registers, 14 functionally
identical message centers, plus a fifteenth message center which is receive only and incorporates a
buffered FIFO. The following tables describe the organization of the message centers located in MOVX
space.
MOVX MESSAGE CENTERS FOR CAN 0
CAN 0 CONTROL/STATUS/MASK REGISTERS
Register
C0MID0
C0MA0
C0MID1
C0MA1
C0BT0
C0BT1
C0SGM0
C0SGM1
C0EGM0
C0EGM1
C0EGM2
C0EGM3
C0M15M0
C0M15M1
C0M15M2
C0M15M3
7
6
5
4
3
2
1
0
MOVX Data
Address
1
xxxx00h
xxxx01h
xxxx02h
xxxx03h
xxxx04h
xxxx05h
xxxx06h
xxxx07h
xxxx08h
xxxx09h
xxxx0Ah
xxxx0Bh
xxxx0Ch
xxxx0Dh
xxxx0Eh
xxxx0Fh
MID07 MID06 MID05 MID04 MID03 MID02 MID01 MID00
M0AA7 M0AA6 M0AA5 M0AA4 M0AA3 M0AA2 M0AA1 M0AA0
MID17 MID16 MID15 MID14 MID13 MID12 MID11 MID10
M1AA7 M1AA6 M1AA5 M1AA4 M1AA3 M1AA2 M1AA1 M1AA0
SJW1
SJW0
BPR5
BPR4
SMP
TSEG26 TSEG25 TSEG24 TSEG13 TSEG12 TSEG11 TSEG10
ID28
ID27
ID26
ID25
ID20
ID19
ID18
0
ID28
ID27
ID26
ID25
ID20
ID19
ID18
ID17
ID12
ID11
ID10
ID9
ID4
ID3
ID2
ID1
ID28
ID27
ID26
ID25
ID20
ID19
ID18
ID17
ID12
ID11
ID10
ID9
ID4
ID3
ID2
ID1
BPR3
BPR2
BPR1
BPR0
ID24
0
ID24
ID16
ID8
ID0
ID24
ID16
ID8
ID0
ID23
0
ID23
ID15
ID7
0
ID23
ID15
ID7
0
ID22
0
ID22
ID14
ID6
0
ID22
ID14
ID6
0
ID21
0
ID21
ID13
ID5
0
ID21
ID13
ID5
0
CAN 0 MESSAGE CENTER 1
Reserved
CAN 0 MESSAGE 1 ARBITRATION REGISTER 0
CAN 0 MESSAGE 1 ARBITRATION REGISTER 1
CAN 0 MESSAGE 1 ARBITRATION REGISTER 2
CAN 0 MESSAGE 1 ARBITRATION REGISTER 3
DTBYC3DTBYC2DTBYC1DTBYC0
CAN 0 MESSAGE 1 DATA BYTES 0 - 7
xxxx10h - 11h
xxxx12h
xxxx13h
xxxx14h
xxxx15h
xxxx16h
xxxx17h - 1Eh
xxxx1Fh
C0M1AR0
C0M1AR1
C0M1AR2
C0M1AR3
C0M1F
C0M1D0-7
WTOE
MDME
T/
R
EX/
ST
MEME
Reserved