參數(shù)資料
型號(hào): DS80C390
英文描述: Dual CAN High-Speed Microprocessor
中文描述: 雙CAN高速微處理器
文件頁數(shù): 45/58頁
文件大?。?/td> 5486K
代理商: DS80C390
DS80C390
45 of 58
110199
MOVX CHARACTERISTICS (Non-multiplexed address/data bus)
PARAMETER
SYMBOL
MIN
MAX
UNITS STRETCH
VALUES
C
ST
(MD2:0)
t
PXIZ
0.5 t
MCS
-5
0.75 t
MCS
-5
2.75 t
MCS
-10
0.25 t
MCS
-5
C
ST
=0
1
C
ST
3
4
C
ST
7
Input Instruction Float after
PSEN
ns
ns
PSEN
High to Data Address,
Port 4 CE, Port 5 PCE Valid
RD
Pulse Width
t
PHAV
t
RLRH
0.5 t
MCS
-5
C
ST
t
MCS
-10
0.5 t
MCS
-5
C
ST
t
MCS
-10
ns
C
ST
=0
1
C
ST
7
C
ST
=0
1
C
ST
7
C
ST
= 0
1
C
ST
7
WR
Pulse Width
t
WLWH
ns
RD
Low to Valid Data In
t
RLDV
0.5 t
MCS
-20
C
ST
t
MCS
-20
ns
Data Hold after Read
Data Float after Read
t
RHDX
t
RHDZ
0
ns
ns
0.5 t
MCS
-5
0.75t
MCS
-5
1.75 t
MCS
-5
0.5 t
MCS
-5
0.75t
MCS
-5
2.75 t
MCS
-5
0.5 t
MCS
-5
0.75t
MCS
-5
2.75 t
MCS
-5
0.75 t
MCS
-20
(C
ST
+0. 5)
t
MCS
-20
(C
ST
+2.5)
t
MCS
-20
0.875 t
MCS
-20
(C
ST
+0.625)
t
MCS
-20
(C
ST
+2.625)
t
MCS
-20
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
PSEN
High to
WR
Low
t
PHWL
ns
Data Float after Read
t
PHRL
ns
t
AVDV1
ns
Port 1 Address, Port 4 CE, Port
5 PCE to Valid Data In
t
AVDV2
ns
Port 2, 4 Address to Valid Data
In
t
AVWL1
0.25 t
MCS
-5
0.5t
MCS
-5
2.5 t
MCS
-10
0.375 t
MCS
-5
0.625t
MCS
-5
2.625 t
MCS
-10
-5
0.25 t
MCS
-5
0.5t
MCS
-5
1.5 t
MCS
-10
0
0.25 t
MCS
-5
1.25 t
MCS
-5
ns
Port 0 Address, Port 4 CE, Port
5 PCE to
RD
or
WR
Low
t
AVWL2
ns
Port 2, 4 Address to
RD
or
WR
Low
Data Valid to
WR
Transition
Data hold after
WR
high
t
QVWX
t
WHQX
ns
ns
C
ST
= 0
1
C
ST
3
4
C
ST
7
C
ST
= 0
1
C
ST
3
4
C
ST
7
t
WHCEH
10
ns
0.25 t
MCS
+5
1.25 t
MCS
+5
RD
or
WR
High to ALE, Port 4
CE or Port 5 PCE High
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