參數(shù)資料
型號： DSP56858VF120
廠商： 飛思卡爾半導體(中國)有限公司
英文描述： 16-bit Digital Signal Controllers
中文描述： 16位數(shù)字信號控制器
文件頁數(shù)： 29/64頁
文件大?。?/td> 956K
代理商： DSP56858VF120
External Clock Operation
56858 Technical Data, Rev. 6
Freescale Semiconductor
29
4.5.2
The recommended method of connecting an external clock is given in
Figure 4-7
.
The external clock
source is connected to XTAL and the EXTAL pin is held at ground, V
DDA
, or V
DDA
/2. The TOD_SEL
bit in CGM must be set to 0.
High Speed External Clock Source (> 4MHz)
Figure 4-7 Connecting a High Speed External Clock Signal using XTAL
4.5.3
The recommended method of connecting an external clock is given in
Figure 4-8
.
The external clock
source is connected to XTAL and the EXTAL pin is held at V
DDA
/2. The TOD_SEL bit in CGM must be
set to 0.
Low Speed External Clock Source (2-4MHz)
Figure 4-8 Connecting a Low Speed External Clock Signal using XTAL
Table 4-5 External Clock Operation Timing Requirements
4
Operating Conditions: V
SS
= V
SSIO
= V
SSA
= 0 V, V
DD
= 1.62-1.98V, V
DDIO
= V
DDA
=
3.0–3.6V, T
A
= –40
°
to +120
°
C, C
L
≤
50pF, f
op
= 120MHz
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of operation (external clock driver)
1
1.
See
Figure 4-7
for details on using the recommended connection of an external clock driver.
f
osc
0
—
240
MHz
Clock Pulse Width
4
t
PW
6.25
—
—
ns
External clock input rise time
2, 4
2.
External clock input rise time is measured from 10% to 90%.
t
rise
—
—
TBD
ns
External clock input fall time
3,
4
3.
External clock input fall time is measured from 90% to 10%.
4.
Parameters listed are guaranteed by design.
t
fall
—
—
TBD
ns
56858
XTAL
EXTAL
External
Clock
(up to 240MHz)
GND,
V
DDA
,
or V
DDA
/2
56858
XTAL
EXTAL
External
Clock
(2-4MHz)
V
DDA
/2
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